ARM: tegra: Add PLL_M_UD and PLL_C_UD to tegra124-car binding header
Add these clocks to the binding header so that EMC timings that have them as parent can refer to the clocks. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
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@ -337,6 +337,10 @@
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#define TEGRA124_CLK_DSIB_MUX 310
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#define TEGRA124_CLK_DSIB_MUX 310
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#define TEGRA124_CLK_SOR0_LVDS 311
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#define TEGRA124_CLK_SOR0_LVDS 311
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#define TEGRA124_CLK_XUSB_SS_DIV2 312
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#define TEGRA124_CLK_XUSB_SS_DIV2 312
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#define TEGRA124_CLK_CLK_MAX 313
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#define TEGRA124_CLK_PLL_M_UD 313
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#define TEGRA124_CLK_PLL_C_UD 314
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#define TEGRA124_CLK_CLK_MAX 315
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#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
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#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
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