DTS changes including one new Veyron-board and the Radxa Rock2
system-on-module as well as the square baseboard. On top of that a lot of mmc-related changes to improve speeds on the Cortex-A9 socs and also setting up the supplies for rk3288 mmc-controllers for the following mmc-tuning support. And of course the dts-part of the rk3288 power-domains. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJWFta1AAoJEPOmecmc0R2BwsoH/iAhuYW/AMw9theS5e3QKYaT AetDQHjjXPkbQpkMMxVpyyIGhBvHWHX+iTINqkVVx5MVlhvC1xmF4oJ6Yo4lbDVF S6YgYrgI72P4inP0v3DZhJ2CpYB7bTVcPsU/ZiJOacvwKk2rgXWqE+nbBrZHpYbe pDR9ONdOB0PsXfTsawcjb1FmK2/+xwRhHZJUSdlQRIoUZe1qIOjR2Lx25sprQ6vb v6sBuY2T/rrWlKE0ME6HtdcA2s7HLKY1E1OdQPr15ceXR8k0yRz0dqH0ydULtZVZ d6ZghxS+1ygir6Uw4sUXQa5QZjEeWU7M9+z6jCdKLEH/jUuaTFKFj+tko9uboa8= =LB4D -----END PGP SIGNATURE----- Merge tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Merge "Rockchip dts32 changes for 4.4" from Heiko Stuebner: DTS changes including one new Veyron-board and the Radxa Rock2 system-on-module as well as the square baseboard. On top of that a lot of mmc-related changes to improve speeds on the Cortex-A9 socs and also setting up the supplies for rk3288 mmc-controllers for the following mmc-tuning support. And of course the dts-part of the rk3288 power-domains. * tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add the support power-domain node on RK3288 SoCs ARM: dts: rockchip: add rk3288-firefly iodomains ARM: dts: rockchip: fixup firefly mmc supplies ARM: dts: rockchip: add rk3288-popmetal iodomains ARM: dts: rockchip: add rk3288-popmetal mmc supplies ARM: dts: rockchip: add rk3288-popmetal board to dtb list ARM: dts: rockchip: Add dtb for the Radxa Rock 2 Square board ARM: dts: rockchip: support highspeed sd-cards on rk3066a boards ARM: dts: rockchip: support highspeed sd-cards for rk3188-radxarock ARM: dts: rockchip: Add the hdmi-ddc pinctrl settings for rk3288 ARM: dts: rockchip: Remove specific cts pullup from veyron ARM: dts: rockchip: pull up cts lines on rk3288 ARM: dts: rockchip: add veyron-jaq board ARM: dts: rockchip: Add support for SD/MMC on MarsBoard-RK3066 dt-bindings: add power-domain header for RK3288 SoCs
This commit is contained in:
commit
d27199cb03
|
@ -17,6 +17,10 @@ Rockchip platforms device tree bindings
|
||||||
Required root node properties:
|
Required root node properties:
|
||||||
- compatible = "radxa,rock", "rockchip,rk3188";
|
- compatible = "radxa,rock", "rockchip,rk3188";
|
||||||
|
|
||||||
|
- Radxa Rock2 Square board:
|
||||||
|
Required root node properties:
|
||||||
|
- compatible = "radxa,rock2-square", "rockchip,rk3288";
|
||||||
|
|
||||||
- Firefly Firefly-RK3288 board:
|
- Firefly Firefly-RK3288 board:
|
||||||
Required root node properties:
|
Required root node properties:
|
||||||
- compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
|
- compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
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||||||
|
@ -31,6 +35,13 @@ Rockchip platforms device tree bindings
|
||||||
Required root node properties:
|
Required root node properties:
|
||||||
- compatible = "netxeon,r89", "rockchip,rk3288";
|
- compatible = "netxeon,r89", "rockchip,rk3288";
|
||||||
|
|
||||||
|
- Google Jaq (Haier Chromebook 11 and more):
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||||||
|
Required root node properties:
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||||||
|
- compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
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||||||
|
"google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
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||||||
|
"google,veyron-jaq-rev1", "google,veyron-jaq",
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|
"google,veyron", "rockchip,rk3288";
|
||||||
|
|
||||||
- Google Jerry (Hisense Chromebook C11 and more):
|
- Google Jerry (Hisense Chromebook C11 and more):
|
||||||
Required root node properties:
|
Required root node properties:
|
||||||
- compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
|
- compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
|
||||||
|
|
|
@ -509,7 +509,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||||
rk3288-evb-rk808.dtb \
|
rk3288-evb-rk808.dtb \
|
||||||
rk3288-firefly-beta.dtb \
|
rk3288-firefly-beta.dtb \
|
||||||
rk3288-firefly.dtb \
|
rk3288-firefly.dtb \
|
||||||
|
rk3288-popmetal.dtb \
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||||||
rk3288-r89.dtb \
|
rk3288-r89.dtb \
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||||||
|
rk3288-rock2-square.dtb \
|
||||||
|
rk3288-veyron-jaq.dtb \
|
||||||
rk3288-veyron-jerry.dtb \
|
rk3288-veyron-jerry.dtb \
|
||||||
rk3288-veyron-minnie.dtb \
|
rk3288-veyron-minnie.dtb \
|
||||||
rk3288-veyron-pinky.dtb \
|
rk3288-veyron-pinky.dtb \
|
||||||
|
|
|
@ -186,6 +186,8 @@
|
||||||
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
|
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
|
||||||
vmmc-supply = <&vcc_sd0>;
|
vmmc-supply = <&vcc_sd0>;
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
|
cap-mmc-highspeed;
|
||||||
|
cap-sd-highspeed;
|
||||||
disable-wp;
|
disable-wp;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -178,6 +178,14 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&mmc0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
|
||||||
|
vmmc-supply = <&vcc_sd0>;
|
||||||
|
};
|
||||||
|
|
||||||
&pinctrl {
|
&pinctrl {
|
||||||
lan8720a {
|
lan8720a {
|
||||||
phy_int: phy-int {
|
phy_int: phy-int {
|
||||||
|
|
|
@ -330,6 +330,8 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
|
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
|
||||||
vmmc-supply = <&vcc_sd>;
|
vmmc-supply = <&vcc_sd>;
|
||||||
|
cap-mmc-highspeed;
|
||||||
|
cap-sd-highspeed;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -289,6 +289,8 @@
|
||||||
vmmc-supply = <&vcc_sd0>;
|
vmmc-supply = <&vcc_sd0>;
|
||||||
|
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
|
cap-mmc-highspeed;
|
||||||
|
cap-sd-highspeed;
|
||||||
disable-wp;
|
disable-wp;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -48,6 +48,14 @@
|
||||||
reg = <0 0x80000000>;
|
reg = <0 0x80000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
dovdd_1v8: dovdd-1v8-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "dovdd_1v8";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
vin-supply = <&vcc28_dvp>;
|
||||||
|
};
|
||||||
|
|
||||||
ext_gmac: external-gmac-clock {
|
ext_gmac: external-gmac-clock {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
|
@ -55,6 +63,22 @@
|
||||||
clock-output-names = "ext_gmac";
|
clock-output-names = "ext_gmac";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
io_domains: io-domains {
|
||||||
|
compatible = "rockchip,rk3288-io-voltage-domain";
|
||||||
|
rockchip,grf = <&grf>;
|
||||||
|
|
||||||
|
audio-supply = <&vcca_33>;
|
||||||
|
bb-supply = <&vcc_io>;
|
||||||
|
dvp-supply = <&dovdd_1v8>;
|
||||||
|
flash0-supply = <&vcc_flash>;
|
||||||
|
flash1-supply = <&vcc_lan>;
|
||||||
|
gpio30-supply = <&vcc_io>;
|
||||||
|
gpio1830-supply = <&vcc_io>;
|
||||||
|
lcdc-supply = <&vcc_io>;
|
||||||
|
sdcard-supply = <&vccio_sd>;
|
||||||
|
wifi-supply = <&vccio_wl>;
|
||||||
|
};
|
||||||
|
|
||||||
ir: ir-receiver {
|
ir: ir-receiver {
|
||||||
compatible = "gpio-ir-receiver";
|
compatible = "gpio-ir-receiver";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -96,7 +120,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
vcc_sys: vsys-regulator {
|
vbat_wl: vcc_sys: vsys-regulator {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "vcc_sys";
|
regulator-name = "vcc_sys";
|
||||||
regulator-min-microvolt = <5000000>;
|
regulator-min-microvolt = <5000000>;
|
||||||
|
@ -160,6 +184,23 @@
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
vin-supply = <&vcc_5v>;
|
vin-supply = <&vcc_5v>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* A TT8142 creates both dovdd_1v8 and vcc28_dvp, controlled
|
||||||
|
* by the dvp_pwr pin.
|
||||||
|
*/
|
||||||
|
vcc28_dvp: vcc28-dvp-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&dvp_pwr>;
|
||||||
|
regulator-name = "vcc28_dvp";
|
||||||
|
regulator-min-microvolt = <2800000>;
|
||||||
|
regulator-max-microvolt = <2800000>;
|
||||||
|
regulator-always-on;
|
||||||
|
vin-supply = <&vcc_io>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&cpu0 {
|
&cpu0 {
|
||||||
|
@ -325,7 +366,7 @@
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
vcc_18: REG11 {
|
vccio_wl: vcc_18: REG11 {
|
||||||
regulator-name = "vcc_18";
|
regulator-name = "vcc_18";
|
||||||
regulator-min-microvolt = <1800000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
regulator-max-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
||||||
|
@ -373,6 +414,12 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
dvp {
|
||||||
|
dvp_pwr: dvp-pwr {
|
||||||
|
rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
gmac {
|
gmac {
|
||||||
phy_int: phy-int {
|
phy_int: phy-int {
|
||||||
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
|
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||||
|
@ -445,7 +492,8 @@
|
||||||
num-slots = <1>;
|
num-slots = <1>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
|
pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
|
||||||
vmmc-supply = <&vcc_18>;
|
vmmc-supply = <&vbat_wl>;
|
||||||
|
vqmmc-supply = <&vccio_wl>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -459,6 +507,7 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
|
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
|
||||||
vmmc-supply = <&vcc_sd>;
|
vmmc-supply = <&vcc_sd>;
|
||||||
|
vqmmc-supply = <&vccio_sd>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -79,6 +79,22 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
io_domains: io-domains {
|
||||||
|
compatible = "rockchip,rk3288-io-voltage-domain";
|
||||||
|
rockchip,grf = <&grf>;
|
||||||
|
|
||||||
|
audio-supply = <&vcca_33>;
|
||||||
|
bb-supply = <&vcc_io>;
|
||||||
|
dvp-supply = <&vcc18_dvp>;
|
||||||
|
flash0-supply = <&vcc_flash>;
|
||||||
|
flash1-supply = <&vcc_lan>;
|
||||||
|
gpio30-supply = <&vcc_io>;
|
||||||
|
gpio1830-supply = <&vcc_io>;
|
||||||
|
lcdc-supply = <&vcc_io>;
|
||||||
|
sdcard-supply = <&vccio_sd>;
|
||||||
|
wifi-supply = <&vccio_wl>;
|
||||||
|
};
|
||||||
|
|
||||||
ir: ir-receiver {
|
ir: ir-receiver {
|
||||||
compatible = "gpio-ir-receiver";
|
compatible = "gpio-ir-receiver";
|
||||||
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
||||||
|
@ -86,6 +102,26 @@
|
||||||
pinctrl-0 = <&ir_int>;
|
pinctrl-0 = <&ir_int>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
vcc_flash: flash-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vcc_flash";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
vin-supply = <&vcc_io>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_sd: sdmmc-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sdmmc_pwr>;
|
||||||
|
regulator-name = "vcc_sd";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
startup-delay-us = <100000>;
|
||||||
|
vin-supply = <&vcc_io>;
|
||||||
|
};
|
||||||
|
|
||||||
vcc_sys: vsys-regulator {
|
vcc_sys: vsys-regulator {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "vcc_sys";
|
regulator-name = "vcc_sys";
|
||||||
|
@ -94,6 +130,31 @@
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* A PT5128 creates both dovdd_1v8 and vcc28_dvp, controlled
|
||||||
|
* by the dvp_pwr pin.
|
||||||
|
*/
|
||||||
|
vcc18_dvp: vcc18-dvp-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vcc18-dvp";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
vin-supply = <&vcc28_dvp>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc28_dvp: vcc28-dvp-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&dvp_pwr>;
|
||||||
|
regulator-name = "vcc28_dvp";
|
||||||
|
regulator-min-microvolt = <2800000>;
|
||||||
|
regulator-max-microvolt = <2800000>;
|
||||||
|
regulator-always-on;
|
||||||
|
vin-supply = <&vcc_io>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&cpu0 {
|
&cpu0 {
|
||||||
|
@ -109,6 +170,8 @@
|
||||||
num-slots = <1>;
|
num-slots = <1>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
|
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
|
||||||
|
vmmc-supply = <&vcc_io>;
|
||||||
|
vqmmc-supply = <&vcc_flash>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -121,6 +184,8 @@
|
||||||
num-slots = <1>;
|
num-slots = <1>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
||||||
|
vmmc-supply = <&vcc_sd>;
|
||||||
|
vqmmc-supply = <&vccio_sd>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -297,22 +362,22 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
vcca_codec: LDO_REG8 {
|
vcca_33: LDO_REG8 {
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
regulator-max-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
||||||
regulator-name = "vcca_codec";
|
regulator-name = "vcca_33";
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
regulator-suspend-microvolt = <3300000>;
|
regulator-suspend-microvolt = <3300000>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
vcc_wl: SWITCH_REG1 {
|
vccio_wl: SWITCH_REG1 {
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
regulator-boot-on;
|
regulator-boot-on;
|
||||||
regulator-name = "vcc_wl";
|
regulator-name = "vccio_wl";
|
||||||
regulator-state-mem {
|
regulator-state-mem {
|
||||||
regulator-on-in-suspend;
|
regulator-on-in-suspend;
|
||||||
};
|
};
|
||||||
|
@ -388,6 +453,12 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
dvp {
|
||||||
|
dvp_pwr: dvp-pwr {
|
||||||
|
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
ir {
|
ir {
|
||||||
ir_int: ir-int {
|
ir_int: ir-int {
|
||||||
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
|
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||||
|
@ -405,6 +476,12 @@
|
||||||
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
sdmmc {
|
||||||
|
sdmmc_pwr: sdmmc-pwr {
|
||||||
|
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&tsadc {
|
&tsadc {
|
||||||
|
|
|
@ -0,0 +1,277 @@
|
||||||
|
/*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <dt-bindings/pwm/pwm.h>
|
||||||
|
#include "rk3288.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
memory {
|
||||||
|
reg = <0x0 0x80000000>;
|
||||||
|
device_type = "memory";
|
||||||
|
};
|
||||||
|
|
||||||
|
emmc_pwrseq: emmc-pwrseq {
|
||||||
|
compatible = "mmc-pwrseq-emmc";
|
||||||
|
pinctrl-0 = <&emmc_reset>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ext_gmac: external-gmac-clock {
|
||||||
|
compatible = "fixed-clock";
|
||||||
|
#clock-cells = <0>;
|
||||||
|
clock-frequency = <125000000>;
|
||||||
|
clock-output-names = "ext_gmac";
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_sys: vsys-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vcc_sys";
|
||||||
|
regulator-min-microvolt = <5000000>;
|
||||||
|
regulator-max-microvolt = <5000000>;
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-boot-on;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu0 {
|
||||||
|
cpu0-supply = <&vdd_cpu>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&emmc {
|
||||||
|
bus-width = <8>;
|
||||||
|
cap-mmc-highspeed;
|
||||||
|
disable-wp;
|
||||||
|
non-removable;
|
||||||
|
num-slots = <1>;
|
||||||
|
mmc-pwrseq = <&emmc_pwrseq>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||||
|
vmmc-supply = <&vcc_io>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gmac {
|
||||||
|
assigned-clocks = <&cru SCLK_MAC>;
|
||||||
|
assigned-clock-parents = <&ext_gmac>;
|
||||||
|
clock_in_out = "input";
|
||||||
|
phy-mode = "rgmii";
|
||||||
|
phy-supply = <&vccio_pmu>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&rgmii_pins &phy_rst>;
|
||||||
|
snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
|
||||||
|
snps,reset-active-low;
|
||||||
|
snps,reset-delays-us = <0 10000 30000>;
|
||||||
|
rx_delay = <0x10>;
|
||||||
|
tx_delay = <0x30>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
act8846: act8846@5a {
|
||||||
|
compatible = "active-semi,act8846";
|
||||||
|
reg = <0x5a>;
|
||||||
|
inl1-supply = <&vcc_io>;
|
||||||
|
inl2-supply = <&vcc_sys>;
|
||||||
|
inl3-supply = <&vcc_20>;
|
||||||
|
vp1-supply = <&vcc_sys>;
|
||||||
|
vp2-supply = <&vcc_sys>;
|
||||||
|
vp3-supply = <&vcc_sys>;
|
||||||
|
vp4-supply = <&vcc_sys>;
|
||||||
|
|
||||||
|
regulators {
|
||||||
|
vcc_ddr: REG1 {
|
||||||
|
regulator-name = "VCC_DDR";
|
||||||
|
regulator-min-microvolt = <1200000>;
|
||||||
|
regulator-max-microvolt = <1200000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_io: REG2 {
|
||||||
|
regulator-name = "VCC_IO";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vdd_log: REG3 {
|
||||||
|
regulator-name = "VDD_LOG";
|
||||||
|
regulator-min-microvolt = <1000000>;
|
||||||
|
regulator-max-microvolt = <1000000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_20: REG4 {
|
||||||
|
regulator-name = "VCC_20";
|
||||||
|
regulator-min-microvolt = <2000000>;
|
||||||
|
regulator-max-microvolt = <2000000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vccio_sd: REG5 {
|
||||||
|
regulator-name = "VCCIO_SD";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vdd10_lcd: REG6 {
|
||||||
|
regulator-name = "VDD10_LCD";
|
||||||
|
regulator-min-microvolt = <1000000>;
|
||||||
|
regulator-max-microvolt = <1000000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcca_codec: REG7 {
|
||||||
|
regulator-name = "VCCA_CODEC";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcca_tp: REG8 {
|
||||||
|
regulator-name = "VCCA_TP";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vccio_pmu: REG9 {
|
||||||
|
regulator-name = "VCCIO_PMU";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vdd_10: REG10 {
|
||||||
|
regulator-name = "VDD_10";
|
||||||
|
regulator-min-microvolt = <1000000>;
|
||||||
|
regulator-max-microvolt = <1000000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_18: REG11 {
|
||||||
|
regulator-name = "VCC_18";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc18_lcd: REG12 {
|
||||||
|
regulator-name = "VCC18_LCD";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
vdd_cpu: syr827@40 {
|
||||||
|
compatible = "silergy,syr827";
|
||||||
|
reg = <0x40>;
|
||||||
|
fcs,suspend-voltage-selector = <1>;
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-enable-ramp-delay = <300>;
|
||||||
|
regulator-name = "vdd_cpu";
|
||||||
|
regulator-min-microvolt = <850000>;
|
||||||
|
regulator-max-microvolt = <1350000>;
|
||||||
|
regulator-ramp-delay = <8000>;
|
||||||
|
vin-supply = <&vcc_sys>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vdd_gpu: syr828@41 {
|
||||||
|
compatible = "silergy,syr828";
|
||||||
|
reg = <0x41>;
|
||||||
|
fcs,suspend-voltage-selector = <1>;
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-enable-ramp-delay = <300>;
|
||||||
|
regulator-min-microvolt = <850000>;
|
||||||
|
regulator-max-microvolt = <1350000>;
|
||||||
|
regulator-name = "vdd_gpu";
|
||||||
|
regulator-ramp-delay = <8000>;
|
||||||
|
vin-supply = <&vcc_sys>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
pcfg_output_high: pcfg-output-high {
|
||||||
|
output-high;
|
||||||
|
};
|
||||||
|
|
||||||
|
emmc {
|
||||||
|
emmc_reset: emmc-reset {
|
||||||
|
rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
gmac {
|
||||||
|
phy_rst: phy-rst {
|
||||||
|
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&tsadc {
|
||||||
|
rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
|
||||||
|
rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&vopb {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&vopb_mmu {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&vopl {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&vopl_mmu {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&wdt {
|
||||||
|
status = "okay";
|
||||||
|
};
|
|
@ -0,0 +1,149 @@
|
||||||
|
/*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "rk3288-rock2-som.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Radxa Rock 2 Square";
|
||||||
|
compatible = "radxa,rock2-square", "rockchip,rk3288";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
stdout-path = "serial2:115200n8";
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_usb_host: vcc-host-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&host_vbus_drv>;
|
||||||
|
/* Always on as the rockchip usb phy doesn't have a vbus-supply
|
||||||
|
* property
|
||||||
|
*/
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-name = "vcc_host";
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_sd: sdmmc-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sdmmc_pwr>;
|
||||||
|
regulator-name = "vcc_sd";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
vin-supply = <&vcc_io>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&sdmmc {
|
||||||
|
bus-width = <4>;
|
||||||
|
cap-mmc-highspeed;
|
||||||
|
cap-sd-highspeed;
|
||||||
|
card-detect-delay = <200>;
|
||||||
|
disable-wp; /* wp not hooked up */
|
||||||
|
num-slots = <1>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
||||||
|
vmmc-supply = <&vcc_sd>;
|
||||||
|
vqmmc-supply = <&vccio_sd>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gmac {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&hdmi {
|
||||||
|
ddc-i2c-bus = <&i2c5>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
hym8563@51 {
|
||||||
|
compatible = "haoyu,hym8563";
|
||||||
|
reg = <0x51>;
|
||||||
|
#clock-cells = <0>;
|
||||||
|
clock-frequency = <32768>;
|
||||||
|
clock-output-names = "xin32k";
|
||||||
|
interrupt-parent = <&gpio0>;
|
||||||
|
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pmic_int>;
|
||||||
|
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c5 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
pmic {
|
||||||
|
pmic_int: pmic-int {
|
||||||
|
rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
usb {
|
||||||
|
host_vbus_drv: host-vbus-drv {
|
||||||
|
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
sdmmc {
|
||||||
|
sdmmc_pwr: sdmmc-pwr {
|
||||||
|
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usbphy {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb_host0_ehci {
|
||||||
|
status = "okay";
|
||||||
|
};
|
|
@ -0,0 +1,176 @@
|
||||||
|
/*
|
||||||
|
* Google Veyron Jaq Rev 1+ board device tree source
|
||||||
|
*
|
||||||
|
* Copyright 2015 Google, Inc
|
||||||
|
*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include "rk3288-veyron-chromebook.dtsi"
|
||||||
|
#include "cros-ec-sbs.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Google Jaq";
|
||||||
|
compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
|
||||||
|
"google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
|
||||||
|
"google,veyron-jaq-rev1", "google,veyron-jaq",
|
||||||
|
"google,veyron", "rockchip,rk3288";
|
||||||
|
|
||||||
|
panel_regulator: panel-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&lcd_enable_h>;
|
||||||
|
regulator-name = "panel_regulator";
|
||||||
|
vin-supply = <&vcc33_sys>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc18_lcd: vcc18-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&avdd_1v8_disp_en>;
|
||||||
|
regulator-name = "vcc18_lcd";
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-boot-on;
|
||||||
|
vin-supply = <&vcc18_wl>;
|
||||||
|
};
|
||||||
|
|
||||||
|
backlight_regulator: backlight-regulator {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&bl_pwr_en>;
|
||||||
|
regulator-name = "backlight_regulator";
|
||||||
|
vin-supply = <&vcc33_sys>;
|
||||||
|
startup-delay-us = <15000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&rk808 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
|
||||||
|
dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
|
||||||
|
<&gpio7 15 GPIO_ACTIVE_HIGH>;
|
||||||
|
|
||||||
|
regulators {
|
||||||
|
mic_vcc: LDO_REG2 {
|
||||||
|
regulator-name = "mic_vcc";
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-state-mem {
|
||||||
|
regulator-off-in-suspend;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&sdmmc {
|
||||||
|
disable-wp;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
|
||||||
|
&sdmmc_bus4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&vcc_5v {
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&drv_5v>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&vcc50_hdmi {
|
||||||
|
enable-active-high;
|
||||||
|
gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&vcc50_hdmi_en>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
backlight {
|
||||||
|
bl_pwr_en: bl_pwr_en {
|
||||||
|
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
buck-5v {
|
||||||
|
drv_5v: drv-5v {
|
||||||
|
rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
edp {
|
||||||
|
edp_hpd: edp_hpd {
|
||||||
|
rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
hdmi {
|
||||||
|
vcc50_hdmi_en: vcc50-hdmi-en {
|
||||||
|
rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
lcd {
|
||||||
|
lcd_enable_h: lcd-en {
|
||||||
|
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
|
||||||
|
avdd_1v8_disp_en: avdd-1v8-disp-en {
|
||||||
|
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pmic {
|
||||||
|
dvs_1: dvs-1 {
|
||||||
|
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||||
|
};
|
||||||
|
|
||||||
|
dvs_2: dvs-2 {
|
||||||
|
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
|
@ -544,18 +544,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
/*
|
|
||||||
* On Marvell-based hardware this is a no-connect. Make sure we enable
|
|
||||||
* the pullup so that the line doesn't float. The pullup shouldn't
|
|
||||||
* hurt on Broadcom-based hardware since the other side is actively
|
|
||||||
* driving this signal. As proof: we've already got a pullup on RX.
|
|
||||||
*/
|
|
||||||
uart0 {
|
|
||||||
uart0_cts: uart0-cts {
|
|
||||||
rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
write-protect {
|
write-protect {
|
||||||
fw_wp_ap: fw-wp-ap {
|
fw_wp_ap: fw-wp-ap {
|
||||||
rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
|
rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||||
|
|
|
@ -44,6 +44,7 @@
|
||||||
#include <dt-bindings/pinctrl/rockchip.h>
|
#include <dt-bindings/pinctrl/rockchip.h>
|
||||||
#include <dt-bindings/clock/rk3288-cru.h>
|
#include <dt-bindings/clock/rk3288-cru.h>
|
||||||
#include <dt-bindings/thermal/thermal.h>
|
#include <dt-bindings/thermal/thermal.h>
|
||||||
|
#include <dt-bindings/power/rk3288-power.h>
|
||||||
#include "skeleton.dtsi"
|
#include "skeleton.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
|
@ -613,8 +614,98 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
pmu: power-management@ff730000 {
|
pmu: power-management@ff730000 {
|
||||||
compatible = "rockchip,rk3288-pmu", "syscon";
|
compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd";
|
||||||
reg = <0xff730000 0x100>;
|
reg = <0xff730000 0x100>;
|
||||||
|
|
||||||
|
power: power-controller {
|
||||||
|
compatible = "rockchip,rk3288-power-controller";
|
||||||
|
#power-domain-cells = <1>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Note: Although SCLK_* are the working clocks
|
||||||
|
* of device without including on the NOC, needed for
|
||||||
|
* synchronous reset.
|
||||||
|
*
|
||||||
|
* The clocks on the which NOC:
|
||||||
|
* ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
|
||||||
|
* ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
|
||||||
|
* ACLK_RGA is on ACLK_RGA_NIU.
|
||||||
|
* The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
|
||||||
|
*
|
||||||
|
* Which clock are device clocks:
|
||||||
|
* clocks devices
|
||||||
|
* *_IEP IEP:Image Enhancement Processor
|
||||||
|
* *_ISP ISP:Image Signal Processing
|
||||||
|
* *_VIP VIP:Video Input Processor
|
||||||
|
* *_VOP* VOP:Visual Output Processor
|
||||||
|
* *_RGA RGA
|
||||||
|
* *_EDP* EDP
|
||||||
|
* *_LVDS_* LVDS
|
||||||
|
* *_HDMI HDMI
|
||||||
|
* *_MIPI_* MIPI
|
||||||
|
*/
|
||||||
|
pd_vio {
|
||||||
|
reg = <RK3288_PD_VIO>;
|
||||||
|
clocks = <&cru ACLK_IEP>,
|
||||||
|
<&cru ACLK_ISP>,
|
||||||
|
<&cru ACLK_RGA>,
|
||||||
|
<&cru ACLK_VIP>,
|
||||||
|
<&cru ACLK_VOP0>,
|
||||||
|
<&cru ACLK_VOP1>,
|
||||||
|
<&cru DCLK_VOP0>,
|
||||||
|
<&cru DCLK_VOP1>,
|
||||||
|
<&cru HCLK_IEP>,
|
||||||
|
<&cru HCLK_ISP>,
|
||||||
|
<&cru HCLK_RGA>,
|
||||||
|
<&cru HCLK_VIP>,
|
||||||
|
<&cru HCLK_VOP0>,
|
||||||
|
<&cru HCLK_VOP1>,
|
||||||
|
<&cru PCLK_EDP_CTRL>,
|
||||||
|
<&cru PCLK_HDMI_CTRL>,
|
||||||
|
<&cru PCLK_LVDS_PHY>,
|
||||||
|
<&cru PCLK_MIPI_CSI>,
|
||||||
|
<&cru PCLK_MIPI_DSI0>,
|
||||||
|
<&cru PCLK_MIPI_DSI1>,
|
||||||
|
<&cru SCLK_EDP_24M>,
|
||||||
|
<&cru SCLK_EDP>,
|
||||||
|
<&cru SCLK_ISP_JPE>,
|
||||||
|
<&cru SCLK_ISP>,
|
||||||
|
<&cru SCLK_RGA>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Note: The following 3 are HEVC(H.265) clocks,
|
||||||
|
* and on the ACLK_HEVC_NIU (NOC).
|
||||||
|
*/
|
||||||
|
pd_hevc {
|
||||||
|
reg = <RK3288_PD_HEVC>;
|
||||||
|
clocks = <&cru ACLK_HEVC>,
|
||||||
|
<&cru SCLK_HEVC_CABAC>,
|
||||||
|
<&cru SCLK_HEVC_CORE>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Note: ACLK_VCODEC/HCLK_VCODEC are VCODEC
|
||||||
|
* (video endecoder & decoder) clocks that on the
|
||||||
|
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
|
||||||
|
*/
|
||||||
|
pd_video {
|
||||||
|
reg = <RK3288_PD_VIDEO>;
|
||||||
|
clocks = <&cru ACLK_VCODEC>,
|
||||||
|
<&cru HCLK_VCODEC>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Note: ACLK_GPU is the GPU clock,
|
||||||
|
* and on the ACLK_GPU_NIU (NOC).
|
||||||
|
*/
|
||||||
|
pd_gpu {
|
||||||
|
reg = <RK3288_PD_GPU>;
|
||||||
|
clocks = <&cru ACLK_GPU>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
sgrf: syscon@ff740000 {
|
sgrf: syscon@ff740000 {
|
||||||
|
@ -674,6 +765,7 @@
|
||||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
|
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
|
||||||
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
|
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
|
||||||
|
power-domains = <&power RK3288_PD_VIO>;
|
||||||
resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
|
resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
|
||||||
reset-names = "axi", "ahb", "dclk";
|
reset-names = "axi", "ahb", "dclk";
|
||||||
iommus = <&vopb_mmu>;
|
iommus = <&vopb_mmu>;
|
||||||
|
@ -695,6 +787,7 @@
|
||||||
reg = <0xff930300 0x100>;
|
reg = <0xff930300 0x100>;
|
||||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "vopb_mmu";
|
interrupt-names = "vopb_mmu";
|
||||||
|
power-domains = <&power RK3288_PD_VIO>;
|
||||||
#iommu-cells = <0>;
|
#iommu-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
@ -705,6 +798,7 @@
|
||||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
|
clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
|
||||||
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
|
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
|
||||||
|
power-domains = <&power RK3288_PD_VIO>;
|
||||||
resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
|
resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
|
||||||
reset-names = "axi", "ahb", "dclk";
|
reset-names = "axi", "ahb", "dclk";
|
||||||
iommus = <&vopl_mmu>;
|
iommus = <&vopl_mmu>;
|
||||||
|
@ -726,6 +820,7 @@
|
||||||
reg = <0xff940300 0x100>;
|
reg = <0xff940300 0x100>;
|
||||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "vopl_mmu";
|
interrupt-names = "vopl_mmu";
|
||||||
|
power-domains = <&power RK3288_PD_VIO>;
|
||||||
#iommu-cells = <0>;
|
#iommu-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
@ -738,6 +833,7 @@
|
||||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
|
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
|
||||||
clock-names = "iahb", "isfr";
|
clock-names = "iahb", "isfr";
|
||||||
|
power-domains = <&power RK3288_PD_VIO>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
|
@ -923,6 +1019,13 @@
|
||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
hdmi {
|
||||||
|
hdmi_ddc: hdmi-ddc {
|
||||||
|
rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
|
||||||
|
<7 20 RK_FUNC_2 &pcfg_pull_none>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
pcfg_pull_up: pcfg-pull-up {
|
pcfg_pull_up: pcfg-pull-up {
|
||||||
bias-pull-up;
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
@ -1211,7 +1314,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0_cts: uart0-cts {
|
uart0_cts: uart0-cts {
|
||||||
rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_none>;
|
rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0_rts: uart0-rts {
|
uart0_rts: uart0-rts {
|
||||||
|
@ -1226,7 +1329,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1_cts: uart1-cts {
|
uart1_cts: uart1-cts {
|
||||||
rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_none>;
|
rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_up>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1_rts: uart1-rts {
|
uart1_rts: uart1-rts {
|
||||||
|
@ -1249,7 +1352,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
uart3_cts: uart3-cts {
|
uart3_cts: uart3-cts {
|
||||||
rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_none>;
|
rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_up>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart3_rts: uart3-rts {
|
uart3_rts: uart3-rts {
|
||||||
|
@ -1264,7 +1367,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
uart4_cts: uart4-cts {
|
uart4_cts: uart4-cts {
|
||||||
rockchip,pins = <5 14 3 &pcfg_pull_none>;
|
rockchip,pins = <5 14 3 &pcfg_pull_up>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart4_rts: uart4-rts {
|
uart4_rts: uart4-rts {
|
||||||
|
|
|
@ -0,0 +1,31 @@
|
||||||
|
#ifndef __DT_BINDINGS_POWER_RK3288_POWER_H__
|
||||||
|
#define __DT_BINDINGS_POWER_RK3288_POWER_H__
|
||||||
|
|
||||||
|
/**
|
||||||
|
* RK3288 Power Domain and Voltage Domain Summary.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* VD_CORE */
|
||||||
|
#define RK3288_PD_A17_0 0
|
||||||
|
#define RK3288_PD_A17_1 1
|
||||||
|
#define RK3288_PD_A17_2 2
|
||||||
|
#define RK3288_PD_A17_3 3
|
||||||
|
#define RK3288_PD_SCU 4
|
||||||
|
#define RK3288_PD_DEBUG 5
|
||||||
|
#define RK3288_PD_MEM 6
|
||||||
|
|
||||||
|
/* VD_LOGIC */
|
||||||
|
#define RK3288_PD_BUS 7
|
||||||
|
#define RK3288_PD_PERI 8
|
||||||
|
#define RK3288_PD_VIO 9
|
||||||
|
#define RK3288_PD_ALIVE 10
|
||||||
|
#define RK3288_PD_HEVC 11
|
||||||
|
#define RK3288_PD_VIDEO 12
|
||||||
|
|
||||||
|
/* VD_GPU */
|
||||||
|
#define RK3288_PD_GPU 13
|
||||||
|
|
||||||
|
/* VD_PMU */
|
||||||
|
#define RK3288_PD_PMU 14
|
||||||
|
|
||||||
|
#endif
|
Loading…
Reference in New Issue