powerpc: Use the newly added get_required_mask dma_map_ops hook
Now that the generic code has dma_map_ops set, instead of having a messy ifdef & if block in the base dma_get_required_mask hook push the computation into the dma ops. If the ops fails to set the get_required_mask hook default to the width of dma_addr_t. This also corrects ibmbus ibmebus_dma_supported to require a 64 bit mask. I doubt anything is checking or setting the dma mask on that bus. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org Cc: benh@kernel.crashing.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -37,4 +37,6 @@ struct pdev_archdata {
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u64 dma_mask;
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};
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#define ARCH_HAS_DMA_GET_REQUIRED_MASK
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#endif /* _ASM_POWERPC_DEVICE_H */
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@ -20,8 +20,6 @@
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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#define ARCH_HAS_DMA_GET_REQUIRED_MASK
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/* Some dma direct funcs must be visible for use in other dma_ops */
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extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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@ -71,7 +69,6 @@ static inline unsigned long device_to_mask(struct device *dev)
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*/
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#ifdef CONFIG_PPC64
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extern struct dma_map_ops dma_iommu_ops;
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extern u64 dma_iommu_get_required_mask(struct device *dev);
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#endif
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extern struct dma_map_ops dma_direct_ops;
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@ -90,7 +90,7 @@ static int dma_iommu_dma_supported(struct device *dev, u64 mask)
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return 1;
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}
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u64 dma_iommu_get_required_mask(struct device *dev)
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static u64 dma_iommu_get_required_mask(struct device *dev)
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{
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struct iommu_table *tbl = get_iommu_table_base(dev);
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u64 mask;
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@ -111,5 +111,6 @@ struct dma_map_ops dma_iommu_ops = {
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.dma_supported = dma_iommu_dma_supported,
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.map_page = dma_iommu_map_page,
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.unmap_page = dma_iommu_unmap_page,
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.get_required_mask = dma_iommu_get_required_mask,
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};
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EXPORT_SYMBOL(dma_iommu_ops);
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@ -24,6 +24,21 @@
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unsigned int ppc_swiotlb_enable;
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static u64 swiotlb_powerpc_get_required(struct device *dev)
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{
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u64 end, mask, max_direct_dma_addr = dev->archdata.max_direct_dma_addr;
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end = memblock_end_of_DRAM();
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if (max_direct_dma_addr && end > max_direct_dma_addr)
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end = max_direct_dma_addr;
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end += get_dma_offset(dev);
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mask = 1ULL << (fls64(end) - 1);
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mask += mask - 1;
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return mask;
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}
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/*
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* At the moment, all platforms that use this code only require
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* swiotlb to be used if we're operating on HIGHMEM. Since
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@ -44,6 +59,7 @@ struct dma_map_ops swiotlb_dma_ops = {
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.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = swiotlb_sync_sg_for_device,
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.mapping_error = swiotlb_dma_mapping_error,
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.get_required_mask = swiotlb_powerpc_get_required,
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};
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void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev)
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@ -96,6 +96,18 @@ static int dma_direct_dma_supported(struct device *dev, u64 mask)
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#endif
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}
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static u64 dma_direct_get_required_mask(struct device *dev)
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{
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u64 end, mask;
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end = memblock_end_of_DRAM() + get_dma_offset(dev);
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mask = 1ULL << (fls64(end) - 1);
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mask += mask - 1;
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return mask;
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}
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static inline dma_addr_t dma_direct_map_page(struct device *dev,
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struct page *page,
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unsigned long offset,
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@ -144,6 +156,7 @@ struct dma_map_ops dma_direct_ops = {
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.dma_supported = dma_direct_dma_supported,
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.map_page = dma_direct_map_page,
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.unmap_page = dma_direct_unmap_page,
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.get_required_mask = dma_direct_get_required_mask,
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#ifdef CONFIG_NOT_COHERENT_CACHE
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.sync_single_for_cpu = dma_direct_sync_single,
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.sync_single_for_device = dma_direct_sync_single,
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@ -173,7 +186,6 @@ EXPORT_SYMBOL(dma_set_mask);
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u64 dma_get_required_mask(struct device *dev)
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{
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struct dma_map_ops *dma_ops = get_dma_ops(dev);
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u64 mask, end = 0;
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if (ppc_md.dma_get_required_mask)
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return ppc_md.dma_get_required_mask(dev);
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@ -181,31 +193,10 @@ u64 dma_get_required_mask(struct device *dev)
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if (unlikely(dma_ops == NULL))
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return 0;
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#ifdef CONFIG_PPC64
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else if (dma_ops == &dma_iommu_ops)
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return dma_iommu_get_required_mask(dev);
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#endif
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#ifdef CONFIG_SWIOTLB
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else if (dma_ops == &swiotlb_dma_ops) {
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u64 max_direct_dma_addr = dev->archdata.max_direct_dma_addr;
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if (dma_ops->get_required_mask)
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return dma_ops->get_required_mask(dev);
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end = memblock_end_of_DRAM();
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if (max_direct_dma_addr && end > max_direct_dma_addr)
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end = max_direct_dma_addr;
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end += get_dma_offset(dev);
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}
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#endif
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else if (dma_ops == &dma_direct_ops)
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end = memblock_end_of_DRAM() + get_dma_offset(dev);
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else {
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WARN_ONCE(1, "%s: unknown ops %p\n", __func__, dma_ops);
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end = memblock_end_of_DRAM();
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}
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mask = 1ULL << (fls64(end) - 1);
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mask += mask - 1;
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return mask;
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return DMA_BIT_MASK(8 * sizeof(dma_addr_t));
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}
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EXPORT_SYMBOL_GPL(dma_get_required_mask);
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@ -125,7 +125,12 @@ static void ibmebus_unmap_sg(struct device *dev,
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static int ibmebus_dma_supported(struct device *dev, u64 mask)
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{
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return 1;
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return mask == DMA_BIT_MASK(64);
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}
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static u64 ibmebus_dma_get_required_mask(struct device *dev)
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{
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return DMA_BIT_MASK(64);
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}
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static struct dma_map_ops ibmebus_dma_ops = {
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@ -134,6 +139,7 @@ static struct dma_map_ops ibmebus_dma_ops = {
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.map_sg = ibmebus_map_sg,
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.unmap_sg = ibmebus_unmap_sg,
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.dma_supported = ibmebus_dma_supported,
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.get_required_mask = ibmebus_dma_get_required_mask,
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.map_page = ibmebus_map_page,
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.unmap_page = ibmebus_unmap_page,
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};
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@ -605,6 +605,11 @@ static int vio_dma_iommu_dma_supported(struct device *dev, u64 mask)
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return dma_iommu_ops.dma_supported(dev, mask);
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}
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static u64 vio_dma_get_required_mask(struct device *dev)
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{
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return dma_iommu_ops.get_required_mask(dev);
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}
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struct dma_map_ops vio_dma_mapping_ops = {
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.alloc_coherent = vio_dma_iommu_alloc_coherent,
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.free_coherent = vio_dma_iommu_free_coherent,
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@ -613,7 +618,7 @@ struct dma_map_ops vio_dma_mapping_ops = {
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.map_page = vio_dma_iommu_map_page,
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.unmap_page = vio_dma_iommu_unmap_page,
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.dma_supported = vio_dma_iommu_dma_supported,
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.get_required_mask = vio_dma_get_required_mask,
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};
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/**
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@ -1161,11 +1161,20 @@ __setup("iommu_fixed=", setup_iommu_fixed);
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static u64 cell_dma_get_required_mask(struct device *dev)
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{
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struct dma_map_ops *dma_ops;
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if (!dev->dma_mask)
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return 0;
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if (iommu_fixed_disabled && get_dma_ops(dev) == &dma_iommu_ops)
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return dma_iommu_get_required_mask(dev);
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if (!iommu_fixed_disabled &&
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cell_iommu_get_fixed_address(dev) != OF_BAD_ADDR)
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return DMA_BIT_MASK(64);
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dma_ops = get_dma_ops(dev);
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if (dma_ops->get_required_mask)
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return dma_ops->get_required_mask(dev);
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WARN_ONCE(1, "no get_required_mask in %p ops", dma_ops);
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return DMA_BIT_MASK(64);
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}
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@ -695,12 +695,18 @@ static int ps3_dma_supported(struct device *_dev, u64 mask)
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return mask >= DMA_BIT_MASK(32);
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}
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static u64 ps3_dma_get_required_mask(struct device *_dev)
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{
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return DMA_BIT_MASK(32);
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}
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static struct dma_map_ops ps3_sb_dma_ops = {
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.alloc_coherent = ps3_alloc_coherent,
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.free_coherent = ps3_free_coherent,
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.map_sg = ps3_sb_map_sg,
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.unmap_sg = ps3_sb_unmap_sg,
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.dma_supported = ps3_dma_supported,
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.get_required_mask = ps3_dma_get_required_mask,
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.map_page = ps3_sb_map_page,
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.unmap_page = ps3_unmap_page,
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};
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.map_sg = ps3_ioc0_map_sg,
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.unmap_sg = ps3_ioc0_unmap_sg,
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.dma_supported = ps3_dma_supported,
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.get_required_mask = ps3_dma_get_required_mask,
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.map_page = ps3_ioc0_map_page,
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.unmap_page = ps3_unmap_page,
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};
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@ -1099,7 +1099,7 @@ static u64 dma_get_required_mask_pSeriesLP(struct device *dev)
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return DMA_BIT_MASK(64);
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}
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return dma_iommu_get_required_mask(dev);
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return dma_iommu_ops.get_required_mask(dev);
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}
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#else /* CONFIG_PCI */
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