drm/bridge: use bus flags in bridge timings
The DRM bus flags convey additional information on pixel data on the bus. All current available bus flags might be of interest for a bridge. Remove the sampling_edge field and use bus_flags. In the case at hand a dumb VGA bridge needs a specific data enable polarity (DRM_BUS_FLAG_DE_LOW). Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -234,7 +234,7 @@ static int dumb_vga_remove(struct platform_device *pdev)
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*/
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static const struct drm_bridge_timings default_dac_timings = {
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/* Timing specifications, datasheet page 7 */
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.sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
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.input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
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.setup_time_ps = 500,
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.hold_time_ps = 1500,
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};
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@ -245,7 +245,7 @@ static const struct drm_bridge_timings default_dac_timings = {
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*/
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static const struct drm_bridge_timings ti_ths8134_dac_timings = {
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/* From timing diagram, datasheet page 9 */
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.sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
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.input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
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/* From datasheet, page 12 */
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.setup_time_ps = 3000,
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/* I guess this means latched input */
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@ -258,7 +258,7 @@ static const struct drm_bridge_timings ti_ths8134_dac_timings = {
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*/
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static const struct drm_bridge_timings ti_ths8135_dac_timings = {
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/* From timing diagram, datasheet page 14 */
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.sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
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.input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
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/* From datasheet, page 16 */
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.setup_time_ps = 2000,
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.hold_time_ps = 500,
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@ -244,15 +244,13 @@ struct drm_bridge_funcs {
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*/
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struct drm_bridge_timings {
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/**
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* @sampling_edge:
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* @input_bus_flags:
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*
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* Tells whether the bridge samples the digital input signals from the
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* display engine on the positive or negative edge of the clock. This
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* should use the DRM_BUS_FLAG_PIXDATA_SAMPLE_[POS|NEG]EDGE and
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* DRM_BUS_FLAG_SYNC_SAMPLE_[POS|NEG]EDGE bitwise flags from the DRM
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* connector (bit 2, 3, 6 and 7 valid).
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* Tells what additional settings for the pixel data on the bus
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* this bridge requires (like pixel signal polarity). See also
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* &drm_display_info->bus_flags.
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*/
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u32 sampling_edge;
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u32 input_bus_flags;
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/**
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* @setup_time_ps:
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*
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