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RX-51: Add support for OMAP3 ROM Random Number Generator 

Adding this driver as platform device and only for RX-51 until somebody test if
it working also on other OMAP3 HS devices and until there will be generic ARM
way to deal with SMC calls.

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
[tony@atomide.com: folded in the clock alias change]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Pali Rohár 2013-09-20 15:25:07 +02:00 committed by Tony Lindgren
parent 4748a72402
commit d2065e2b5b
4 changed files with 32 additions and 0 deletions
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19
arch/arm/mach-omap2/board-rx51-peripherals.c
View File

@ -57,6 +57,8 @@
#include "common-board-devices.h" #include "common-board-devices.h"
#include "gpmc.h" #include "gpmc.h"
#include "gpmc-onenand.h" #include "gpmc-onenand.h"
#include "soc.h"
#include "omap-secure.h"
#define SYSTEM_REV_B_USES_VAUX3 0x1699 #define SYSTEM_REV_B_USES_VAUX3 0x1699
#define SYSTEM_REV_S_USES_VAUX3 0x8 #define SYSTEM_REV_S_USES_VAUX3 0x8
@ -1289,6 +1291,22 @@ static void __init rx51_init_twl4030_hwmon(void)
platform_device_register(&madc_hwmon); platform_device_register(&madc_hwmon);
} }
static struct platform_device omap3_rom_rng_device = {
.name = "omap3-rom-rng",
.id = -1,
.dev = {
.platform_data = rx51_secure_rng_call,
},
};
static void __init rx51_init_omap3_rom_rng(void)
{
if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
pr_info("RX-51: Registring OMAP3 HWRNG device\n");
platform_device_register(&omap3_rom_rng_device);
}
}
void __init rx51_peripherals_init(void) void __init rx51_peripherals_init(void)
{ {
rx51_i2c_init(); rx51_i2c_init();
@ -1309,5 +1327,6 @@ void __init rx51_peripherals_init(void)
rx51_charger_init(); rx51_charger_init();
rx51_init_twl4030_hwmon(); rx51_init_twl4030_hwmon();
rx51_init_omap3_rom_rng();
} }

1
arch/arm/mach-omap2/cclock3xxx_data.c
View File

@ -3275,6 +3275,7 @@ static struct omap_clk omap36xx_clks[] = {
static struct omap_clk omap34xx_omap36xx_clks[] = { static struct omap_clk omap34xx_omap36xx_clks[] = {
CLK(NULL, "aes1_ick", &aes1_ick), CLK(NULL, "aes1_ick", &aes1_ick),
CLK("omap_rng", "ick", &rng_ick), CLK("omap_rng", "ick", &rng_ick),
CLK("omap3-rom-rng", "ick", &rng_ick),
CLK(NULL, "sha11_ick", &sha11_ick), CLK(NULL, "sha11_ick", &sha11_ick),
CLK(NULL, "des1_ick", &des1_ick), CLK(NULL, "des1_ick", &des1_ick),
CLK(NULL, "cam_mclk", &cam_mclk), CLK(NULL, "cam_mclk", &cam_mclk),

11
arch/arm/mach-omap2/omap-secure.c
View File

@ -135,3 +135,14 @@ u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits)
FLAG_START_CRITICAL, FLAG_START_CRITICAL,
1, acr, 0, 0, 0); 1, acr, 0, 0, 0);
} }
/**
* rx51_secure_rng_call: Routine for HW random generator
*/
u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag)
{
return rx51_secure_dispatcher(RX51_PPA_HWRNG,
0,
NO_FLAG,
3, ptr, count, flag, 0);
}

1
arch/arm/mach-omap2/omap-secure.h
View File

@ -65,6 +65,7 @@ extern int omap_secure_ram_reserve_memblock(void);
extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
u32 arg1, u32 arg2, u32 arg3, u32 arg4); u32 arg1, u32 arg2, u32 arg3, u32 arg4);
extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
#ifdef CONFIG_OMAP4_ERRATA_I688 #ifdef CONFIG_OMAP4_ERRATA_I688
extern int omap_barrier_reserve_memblock(void); extern int omap_barrier_reserve_memblock(void);