pinctrl: exynos: Add BUS1 pin controller for exynos7
USB and Power regulator on Exynos7 require gpios available in BUS1 pin controller block. So adding the BUS1 pinctrl support. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -180,6 +180,7 @@ Aliases for controllers compatible with "samsung,exynos7-pinctrl":
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- pinctrl5: pin controller of ESE block,
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- pinctrl5: pin controller of ESE block,
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- pinctrl6: pin controller of FSYS0 block,
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- pinctrl6: pin controller of FSYS0 block,
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- pinctrl7: pin controller of FSYS1 block,
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- pinctrl7: pin controller of FSYS1 block,
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- pinctrl8: pin controller of BUS1 block,
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Example: A pin-controller node with pin banks:
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Example: A pin-controller node with pin banks:
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@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
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EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
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EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
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};
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};
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/* pin banks of exynos7 pin-controller - BUS1 */
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static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
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EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
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EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
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EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
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EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c),
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EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
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EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14),
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EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18),
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EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c),
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EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
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EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24),
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};
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const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
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const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
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{
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{
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/* pin-controller instance 0 Alive data */
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/* pin-controller instance 0 Alive data */
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@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
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.pin_banks = exynos7_pin_banks7,
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.pin_banks = exynos7_pin_banks7,
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.nr_banks = ARRAY_SIZE(exynos7_pin_banks7),
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.nr_banks = ARRAY_SIZE(exynos7_pin_banks7),
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.eint_gpio_init = exynos_eint_gpio_init,
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.eint_gpio_init = exynos_eint_gpio_init,
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}, {
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/* pin-controller instance 8 BUS1 data */
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.pin_banks = exynos7_pin_banks8,
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.nr_banks = ARRAY_SIZE(exynos7_pin_banks8),
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.eint_gpio_init = exynos_eint_gpio_init,
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},
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},
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};
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};
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