USB: imx21-hcd accept arbitary transfer buffer alignement.
The hardware can only do DMA to 4 byte aligned addresses. When this requirement is not met use PIO or a bounce buffer. PIO is used when the buffer is small enough to directly use the hardware data memory (2*maxpacket). A bounce buffer is used for larger transfers. Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
1dae423dd9
commit
d0cc3d4100
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@ -57,6 +57,7 @@
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/usb.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include <linux/usb/hcd.h>
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#include <linux/dma-mapping.h>
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#include "imx21-hcd.h"
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#include "imx21-hcd.h"
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@ -136,9 +137,18 @@ static int imx21_hc_get_frame(struct usb_hcd *hcd)
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return wrap_frame(readl(imx21->regs + USBH_FRMNUB));
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return wrap_frame(readl(imx21->regs + USBH_FRMNUB));
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}
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}
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static inline bool unsuitable_for_dma(dma_addr_t addr)
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{
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return (addr & 3) != 0;
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}
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#include "imx21-dbg.c"
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#include "imx21-dbg.c"
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static void nonisoc_urb_completed_for_etd(
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struct imx21 *imx21, struct etd_priv *etd, int status);
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static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb);
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static void free_dmem(struct imx21 *imx21, struct etd_priv *etd);
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/* =========================================== */
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/* =========================================== */
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/* ETD management */
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/* ETD management */
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/* =========================================== */
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/* =========================================== */
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@ -185,7 +195,8 @@ static void reset_etd(struct imx21 *imx21, int num)
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etd_writel(imx21, num, i, 0);
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etd_writel(imx21, num, i, 0);
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etd->urb = NULL;
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etd->urb = NULL;
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etd->ep = NULL;
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etd->ep = NULL;
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etd->td = NULL;;
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etd->td = NULL;
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etd->bounce_buffer = NULL;
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}
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}
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static void free_etd(struct imx21 *imx21, int num)
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static void free_etd(struct imx21 *imx21, int num)
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@ -221,26 +232,94 @@ static void setup_etd_dword0(struct imx21 *imx21,
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((u32) maxpacket << DW0_MAXPKTSIZ));
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((u32) maxpacket << DW0_MAXPKTSIZ));
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}
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}
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static void activate_etd(struct imx21 *imx21,
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/**
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int etd_num, dma_addr_t dma, u8 dir)
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* Copy buffer to data controller data memory.
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* We cannot use memcpy_toio() because the hardware requires 32bit writes
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*/
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static void copy_to_dmem(
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struct imx21 *imx21, int dmem_offset, void *src, int count)
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{
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void __iomem *dmem = imx21->regs + USBOTG_DMEM + dmem_offset;
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u32 word = 0;
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u8 *p = src;
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int byte = 0;
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int i;
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for (i = 0; i < count; i++) {
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byte = i % 4;
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word += (*p++ << (byte * 8));
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if (byte == 3) {
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writel(word, dmem);
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dmem += 4;
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word = 0;
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}
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}
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if (count && byte != 3)
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writel(word, dmem);
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}
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static void activate_etd(struct imx21 *imx21, int etd_num, u8 dir)
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{
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{
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u32 etd_mask = 1 << etd_num;
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u32 etd_mask = 1 << etd_num;
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struct etd_priv *etd = &imx21->etd[etd_num];
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struct etd_priv *etd = &imx21->etd[etd_num];
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if (etd->dma_handle && unsuitable_for_dma(etd->dma_handle)) {
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/* For non aligned isoc the condition below is always true */
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if (etd->len <= etd->dmem_size) {
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/* Fits into data memory, use PIO */
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if (dir != TD_DIR_IN) {
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copy_to_dmem(imx21,
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etd->dmem_offset,
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etd->cpu_buffer, etd->len);
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}
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etd->dma_handle = 0;
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} else {
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/* Too big for data memory, use bounce buffer */
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enum dma_data_direction dmadir;
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if (dir == TD_DIR_IN) {
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dmadir = DMA_FROM_DEVICE;
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etd->bounce_buffer = kmalloc(etd->len,
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GFP_ATOMIC);
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} else {
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dmadir = DMA_TO_DEVICE;
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etd->bounce_buffer = kmemdup(etd->cpu_buffer,
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etd->len,
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GFP_ATOMIC);
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}
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if (!etd->bounce_buffer) {
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dev_err(imx21->dev, "failed bounce alloc\n");
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goto err_bounce_alloc;
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}
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etd->dma_handle =
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dma_map_single(imx21->dev,
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etd->bounce_buffer,
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etd->len,
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dmadir);
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if (dma_mapping_error(imx21->dev, etd->dma_handle)) {
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dev_err(imx21->dev, "failed bounce map\n");
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goto err_bounce_map;
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}
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}
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}
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clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask);
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set_register_bits(imx21, USBH_ETDDONEEN, etd_mask);
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set_register_bits(imx21, USBH_ETDDONEEN, etd_mask);
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clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
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if (dma) {
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if (etd->dma_handle) {
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set_register_bits(imx21, USB_ETDDMACHANLCLR, etd_mask);
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set_register_bits(imx21, USB_ETDDMACHANLCLR, etd_mask);
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clear_toggle_bit(imx21, USBH_XBUFSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_XBUFSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_YBUFSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_YBUFSTAT, etd_mask);
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writel(dma, imx21->regs + USB_ETDSMSA(etd_num));
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writel(etd->dma_handle, imx21->regs + USB_ETDSMSA(etd_num));
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set_register_bits(imx21, USB_ETDDMAEN, etd_mask);
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set_register_bits(imx21, USB_ETDDMAEN, etd_mask);
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} else {
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} else {
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if (dir != TD_DIR_IN) {
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if (dir != TD_DIR_IN) {
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/* need to set for ZLP */
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/* need to set for ZLP and PIO */
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set_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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set_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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set_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
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set_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
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}
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}
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@ -263,6 +342,14 @@ static void activate_etd(struct imx21 *imx21,
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etd->active_count = 1;
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etd->active_count = 1;
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writel(etd_mask, imx21->regs + USBH_ETDENSET);
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writel(etd_mask, imx21->regs + USBH_ETDENSET);
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return;
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err_bounce_map:
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kfree(etd->bounce_buffer);
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err_bounce_alloc:
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free_dmem(imx21, etd);
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nonisoc_urb_completed_for_etd(imx21, etd, -ENOMEM);
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}
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}
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/* =========================================== */
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/* =========================================== */
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@ -325,7 +412,7 @@ static void activate_queued_etd(struct imx21 *imx21,
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etd->dmem_offset = dmem_offset;
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etd->dmem_offset = dmem_offset;
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urb_priv->active = 1;
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urb_priv->active = 1;
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activate_etd(imx21, etd_num, etd->dma_handle, dir);
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activate_etd(imx21, etd_num, dir);
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}
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}
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static void free_dmem(struct imx21 *imx21, struct etd_priv *etd)
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static void free_dmem(struct imx21 *imx21, struct etd_priv *etd)
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@ -385,7 +472,6 @@ static void free_epdmem(struct imx21 *imx21, struct usb_host_endpoint *ep)
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/* =========================================== */
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/* =========================================== */
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/* End handling */
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/* End handling */
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/* =========================================== */
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/* =========================================== */
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static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb);
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/* Endpoint now idle - release it's ETD(s) or asssign to queued request */
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/* Endpoint now idle - release it's ETD(s) or asssign to queued request */
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static void ep_idle(struct imx21 *imx21, struct ep_priv *ep_priv)
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static void ep_idle(struct imx21 *imx21, struct ep_priv *ep_priv)
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ep_idle(imx21, ep_priv);
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ep_idle(imx21, ep_priv);
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}
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}
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static void nonisoc_urb_completed_for_etd(
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struct imx21 *imx21, struct etd_priv *etd, int status)
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{
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struct usb_host_endpoint *ep = etd->ep;
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urb_done(imx21->hcd, etd->urb, status);
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etd->urb = NULL;
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if (!list_empty(&ep->urb_list)) {
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struct urb *urb = list_first_entry(
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&ep->urb_list, struct urb, urb_list);
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dev_vdbg(imx21->dev, "next URB %p\n", urb);
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schedule_nonisoc_etd(imx21, urb);
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}
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}
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/* =========================================== */
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/* =========================================== */
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/* ISOC Handling ... */
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/* ISOC Handling ... */
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/* =========================================== */
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/* =========================================== */
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@ -500,6 +604,8 @@ too_late:
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etd->ep = td->ep;
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etd->ep = td->ep;
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etd->urb = td->urb;
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etd->urb = td->urb;
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etd->len = td->len;
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etd->len = td->len;
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etd->dma_handle = td->dma_handle;
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etd->cpu_buffer = td->cpu_buffer;
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debug_isoc_submitted(imx21, cur_frame, td);
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debug_isoc_submitted(imx21, cur_frame, td);
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@ -513,16 +619,17 @@ too_late:
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(TD_NOTACCESSED << DW3_COMPCODE0) |
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(TD_NOTACCESSED << DW3_COMPCODE0) |
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(td->len << DW3_PKTLEN0));
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(td->len << DW3_PKTLEN0));
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activate_etd(imx21, etd_num, td->data, dir);
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activate_etd(imx21, etd_num, dir);
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}
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}
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}
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}
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static void isoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
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static void isoc_etd_done(struct usb_hcd *hcd, int etd_num)
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{
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{
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struct imx21 *imx21 = hcd_to_imx21(hcd);
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struct imx21 *imx21 = hcd_to_imx21(hcd);
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int etd_mask = 1 << etd_num;
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int etd_mask = 1 << etd_num;
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struct urb_priv *urb_priv = urb->hcpriv;
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struct etd_priv *etd = imx21->etd + etd_num;
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struct etd_priv *etd = imx21->etd + etd_num;
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struct urb *urb = etd->urb;
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struct urb_priv *urb_priv = urb->hcpriv;
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struct td *td = etd->td;
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struct td *td = etd->td;
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struct usb_host_endpoint *ep = etd->ep;
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struct usb_host_endpoint *ep = etd->ep;
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int isoc_index = td->isoc_index;
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int isoc_index = td->isoc_index;
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@ -556,8 +663,13 @@ static void isoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
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bytes_xfrd, td->len, urb, etd_num, isoc_index);
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bytes_xfrd, td->len, urb, etd_num, isoc_index);
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}
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}
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if (dir_in)
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if (dir_in) {
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clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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if (!etd->dma_handle)
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memcpy_fromio(etd->cpu_buffer,
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imx21->regs + USBOTG_DMEM + etd->dmem_offset,
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bytes_xfrd);
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}
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urb->actual_length += bytes_xfrd;
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urb->actual_length += bytes_xfrd;
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urb->iso_frame_desc[isoc_index].actual_length = bytes_xfrd;
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urb->iso_frame_desc[isoc_index].actual_length = bytes_xfrd;
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@ -716,12 +828,14 @@ static int imx21_hc_urb_enqueue_isoc(struct usb_hcd *hcd,
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/* set up transfers */
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/* set up transfers */
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td = urb_priv->isoc_td;
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td = urb_priv->isoc_td;
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for (i = 0; i < urb->number_of_packets; i++, td++) {
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for (i = 0; i < urb->number_of_packets; i++, td++) {
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unsigned int offset = urb->iso_frame_desc[i].offset;
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td->ep = ep;
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td->ep = ep;
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td->urb = urb;
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td->urb = urb;
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td->len = urb->iso_frame_desc[i].length;
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td->len = urb->iso_frame_desc[i].length;
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td->isoc_index = i;
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td->isoc_index = i;
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td->frame = wrap_frame(urb->start_frame + urb->interval * i);
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td->frame = wrap_frame(urb->start_frame + urb->interval * i);
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td->data = urb->transfer_dma + urb->iso_frame_desc[i].offset;
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td->dma_handle = urb->transfer_dma + offset;
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td->cpu_buffer = urb->transfer_buffer + offset;
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list_add_tail(&td->list, &ep_priv->td_list);
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list_add_tail(&td->list, &ep_priv->td_list);
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}
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}
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@ -812,13 +926,15 @@ static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb)
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if (usb_pipecontrol(pipe) && (state != US_CTRL_DATA)) {
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if (usb_pipecontrol(pipe) && (state != US_CTRL_DATA)) {
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if (state == US_CTRL_SETUP) {
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if (state == US_CTRL_SETUP) {
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dir = TD_DIR_SETUP;
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dir = TD_DIR_SETUP;
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if (unsuitable_for_dma(urb->setup_dma))
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unmap_urb_setup_for_dma(imx21->hcd, urb);
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etd->dma_handle = urb->setup_dma;
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etd->dma_handle = urb->setup_dma;
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etd->cpu_buffer = urb->setup_packet;
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bufround = 0;
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bufround = 0;
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count = 8;
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count = 8;
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datatoggle = TD_TOGGLE_DATA0;
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datatoggle = TD_TOGGLE_DATA0;
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} else { /* US_CTRL_ACK */
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} else { /* US_CTRL_ACK */
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dir = usb_pipeout(pipe) ? TD_DIR_IN : TD_DIR_OUT;
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dir = usb_pipeout(pipe) ? TD_DIR_IN : TD_DIR_OUT;
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etd->dma_handle = urb->transfer_dma;
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bufround = 0;
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bufround = 0;
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count = 0;
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count = 0;
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datatoggle = TD_TOGGLE_DATA1;
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datatoggle = TD_TOGGLE_DATA1;
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@ -826,7 +942,11 @@ static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb)
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} else {
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} else {
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dir = usb_pipeout(pipe) ? TD_DIR_OUT : TD_DIR_IN;
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dir = usb_pipeout(pipe) ? TD_DIR_OUT : TD_DIR_IN;
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bufround = (dir == TD_DIR_IN) ? 1 : 0;
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bufround = (dir == TD_DIR_IN) ? 1 : 0;
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if (unsuitable_for_dma(urb->transfer_dma))
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unmap_urb_for_dma(imx21->hcd, urb);
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etd->dma_handle = urb->transfer_dma;
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etd->dma_handle = urb->transfer_dma;
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etd->cpu_buffer = urb->transfer_buffer;
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if (usb_pipebulk(pipe) && (state == US_BULK0))
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if (usb_pipebulk(pipe) && (state == US_BULK0))
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count = 0;
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count = 0;
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else
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else
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||||||
|
@ -901,14 +1021,15 @@ static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb)
|
||||||
/* enable the ETD to kick off transfer */
|
/* enable the ETD to kick off transfer */
|
||||||
dev_vdbg(imx21->dev, "Activating etd %d for %d bytes %s\n",
|
dev_vdbg(imx21->dev, "Activating etd %d for %d bytes %s\n",
|
||||||
etd_num, count, dir != TD_DIR_IN ? "out" : "in");
|
etd_num, count, dir != TD_DIR_IN ? "out" : "in");
|
||||||
activate_etd(imx21, etd_num, etd->dma_handle, dir);
|
activate_etd(imx21, etd_num, dir);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void nonisoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
|
static void nonisoc_etd_done(struct usb_hcd *hcd, int etd_num)
|
||||||
{
|
{
|
||||||
struct imx21 *imx21 = hcd_to_imx21(hcd);
|
struct imx21 *imx21 = hcd_to_imx21(hcd);
|
||||||
struct etd_priv *etd = &imx21->etd[etd_num];
|
struct etd_priv *etd = &imx21->etd[etd_num];
|
||||||
|
struct urb *urb = etd->urb;
|
||||||
u32 etd_mask = 1 << etd_num;
|
u32 etd_mask = 1 << etd_num;
|
||||||
struct urb_priv *urb_priv = urb->hcpriv;
|
struct urb_priv *urb_priv = urb->hcpriv;
|
||||||
int dir;
|
int dir;
|
||||||
|
@ -930,7 +1051,20 @@ static void nonisoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
|
||||||
if (dir == TD_DIR_IN) {
|
if (dir == TD_DIR_IN) {
|
||||||
clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
|
clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
|
||||||
clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
|
clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
|
||||||
|
|
||||||
|
if (etd->bounce_buffer) {
|
||||||
|
memcpy(etd->cpu_buffer, etd->bounce_buffer, bytes_xfrd);
|
||||||
|
dma_unmap_single(imx21->dev,
|
||||||
|
etd->dma_handle, etd->len, DMA_FROM_DEVICE);
|
||||||
|
} else if (!etd->dma_handle && bytes_xfrd) {/* PIO */
|
||||||
|
memcpy_fromio(etd->cpu_buffer,
|
||||||
|
imx21->regs + USBOTG_DMEM + etd->dmem_offset,
|
||||||
|
bytes_xfrd);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
kfree(etd->bounce_buffer);
|
||||||
|
etd->bounce_buffer = NULL;
|
||||||
free_dmem(imx21, etd);
|
free_dmem(imx21, etd);
|
||||||
|
|
||||||
urb->error_count = 0;
|
urb->error_count = 0;
|
||||||
|
@ -988,24 +1122,15 @@ static void nonisoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!etd_done) {
|
if (etd_done)
|
||||||
|
nonisoc_urb_completed_for_etd(imx21, etd, cc_to_error[cc]);
|
||||||
|
else {
|
||||||
dev_vdbg(imx21->dev, "next state=%d\n", urb_priv->state);
|
dev_vdbg(imx21->dev, "next state=%d\n", urb_priv->state);
|
||||||
schedule_nonisoc_etd(imx21, urb);
|
schedule_nonisoc_etd(imx21, urb);
|
||||||
} else {
|
|
||||||
struct usb_host_endpoint *ep = urb->ep;
|
|
||||||
|
|
||||||
urb_done(hcd, urb, cc_to_error[cc]);
|
|
||||||
etd->urb = NULL;
|
|
||||||
|
|
||||||
if (!list_empty(&ep->urb_list)) {
|
|
||||||
urb = list_first_entry(&ep->urb_list,
|
|
||||||
struct urb, urb_list);
|
|
||||||
dev_vdbg(imx21->dev, "next URB %p\n", urb);
|
|
||||||
schedule_nonisoc_etd(imx21, urb);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static struct ep_priv *alloc_ep(void)
|
static struct ep_priv *alloc_ep(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
@ -1146,9 +1271,13 @@ static int imx21_hc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
|
||||||
} else if (urb_priv->active) {
|
} else if (urb_priv->active) {
|
||||||
int etd_num = ep_priv->etd[0];
|
int etd_num = ep_priv->etd[0];
|
||||||
if (etd_num != -1) {
|
if (etd_num != -1) {
|
||||||
|
struct etd_priv *etd = &imx21->etd[etd_num];
|
||||||
|
|
||||||
disactivate_etd(imx21, etd_num);
|
disactivate_etd(imx21, etd_num);
|
||||||
free_dmem(imx21, &imx21->etd[etd_num]);
|
free_dmem(imx21, etd);
|
||||||
imx21->etd[etd_num].urb = NULL;
|
etd->urb = NULL;
|
||||||
|
kfree(etd->bounce_buffer);
|
||||||
|
etd->bounce_buffer = NULL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1248,9 +1377,9 @@ static void process_etds(struct usb_hcd *hcd, struct imx21 *imx21, int sof)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (usb_pipeisoc(etd->urb->pipe))
|
if (usb_pipeisoc(etd->urb->pipe))
|
||||||
isoc_etd_done(hcd, etd->urb, etd_num);
|
isoc_etd_done(hcd, etd_num);
|
||||||
else
|
else
|
||||||
nonisoc_etd_done(hcd, etd->urb, etd_num);
|
nonisoc_etd_done(hcd, etd_num);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* only enable SOF interrupt if it may be needed for the kludge */
|
/* only enable SOF interrupt if it may be needed for the kludge */
|
||||||
|
@ -1718,6 +1847,7 @@ static int imx21_probe(struct platform_device *pdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
imx21 = hcd_to_imx21(hcd);
|
imx21 = hcd_to_imx21(hcd);
|
||||||
|
imx21->hcd = hcd;
|
||||||
imx21->dev = &pdev->dev;
|
imx21->dev = &pdev->dev;
|
||||||
imx21->pdata = pdev->dev.platform_data;
|
imx21->pdata = pdev->dev.platform_data;
|
||||||
if (!imx21->pdata)
|
if (!imx21->pdata)
|
||||||
|
|
|
@ -250,6 +250,7 @@
|
||||||
#define USBCTRL_USB_BYP (1 << 2)
|
#define USBCTRL_USB_BYP (1 << 2)
|
||||||
#define USBCTRL_HOST1_TXEN_OE (1 << 1)
|
#define USBCTRL_HOST1_TXEN_OE (1 << 1)
|
||||||
|
|
||||||
|
#define USBOTG_DMEM 0x1000
|
||||||
|
|
||||||
/* Values in TD blocks */
|
/* Values in TD blocks */
|
||||||
#define TD_DIR_SETUP 0
|
#define TD_DIR_SETUP 0
|
||||||
|
@ -346,8 +347,8 @@ struct td {
|
||||||
struct list_head list;
|
struct list_head list;
|
||||||
struct urb *urb;
|
struct urb *urb;
|
||||||
struct usb_host_endpoint *ep;
|
struct usb_host_endpoint *ep;
|
||||||
dma_addr_t data;
|
dma_addr_t dma_handle;
|
||||||
unsigned long buf_addr;
|
void *cpu_buffer;
|
||||||
int len;
|
int len;
|
||||||
int frame;
|
int frame;
|
||||||
int isoc_index;
|
int isoc_index;
|
||||||
|
@ -360,6 +361,8 @@ struct etd_priv {
|
||||||
struct td *td;
|
struct td *td;
|
||||||
struct list_head queue;
|
struct list_head queue;
|
||||||
dma_addr_t dma_handle;
|
dma_addr_t dma_handle;
|
||||||
|
void *cpu_buffer;
|
||||||
|
void *bounce_buffer;
|
||||||
int alloc;
|
int alloc;
|
||||||
int len;
|
int len;
|
||||||
int dmem_size;
|
int dmem_size;
|
||||||
|
@ -412,6 +415,7 @@ struct debug_isoc_trace {
|
||||||
struct imx21 {
|
struct imx21 {
|
||||||
spinlock_t lock;
|
spinlock_t lock;
|
||||||
struct device *dev;
|
struct device *dev;
|
||||||
|
struct usb_hcd *hcd;
|
||||||
struct mx21_usbh_platform_data *pdata;
|
struct mx21_usbh_platform_data *pdata;
|
||||||
struct list_head dmem_list;
|
struct list_head dmem_list;
|
||||||
struct list_head queue_for_etd; /* eps queued due to etd shortage */
|
struct list_head queue_for_etd; /* eps queued due to etd shortage */
|
||||||
|
|
Loading…
Reference in New Issue