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drm: fix trivial typos 

s/regsiter/register/

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Geliang Tang 2015-10-18 23:29:48 +08:00 committed by Alex Deucher
parent f9fff064bb
commit d0be9f4ec1
4 changed files with 4 additions and 4 deletions
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2
drivers/gpu/drm/amd/include/atombios.h
View File

@ -6784,7 +6784,7 @@ typedef struct _ATOM_MC_INIT_PARAM_TABLE_V2_1
ULONG ulMCUcodeRomStartAddr;
ULONG ulMCUcodeLength;
USHORT usMcRegInitTableOffset; // offset of ATOM_REG_INIT_SETTING array for MC core register settings.
USHORT usReserved; // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY regsiter setting
USHORT usReserved; // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY register setting
}ATOM_MC_INIT_PARAM_TABLE_V2_1;

2
drivers/gpu/drm/radeon/cayman_blit_shaders.c
View File

@ -32,7 +32,7 @@
* evergreen cards need to use the 3D engine to blit data which requires
* quite a bit of hw state setup. Rather than pull the whole 3D driver
* (which normally generates the 3D state) into the DRM, we opt to use
* statically generated state tables. The regsiter state and shaders
* statically generated state tables. The register state and shaders
* were hand generated to support blitting functionality. See the 3D
* driver or documentation for descriptions of the registers and
* shader instructions.

2
drivers/gpu/drm/radeon/evergreen_blit_shaders.c
View File

@ -32,7 +32,7 @@
* evergreen cards need to use the 3D engine to blit data which requires
* quite a bit of hw state setup. Rather than pull the whole 3D driver
* (which normally generates the 3D state) into the DRM, we opt to use
* statically generated state tables. The regsiter state and shaders
* statically generated state tables. The register state and shaders
* were hand generated to support blitting functionality. See the 3D
* driver or documentation for descriptions of the registers and
* shader instructions.

2
drivers/gpu/drm/radeon/r600_blit_shaders.c
View File

@ -32,7 +32,7 @@
* R6xx+ cards need to use the 3D engine to blit data which requires
* quite a bit of hw state setup. Rather than pull the whole 3D driver
* (which normally generates the 3D state) into the DRM, we opt to use
* statically generated state tables. The regsiter state and shaders
* statically generated state tables. The register state and shaders
* were hand generated to support blitting functionality. See the 3D
* driver or documentation for descriptions of the registers and
* shader instructions.