arm64/mte: Add hwcap for asymmetric mode
Allow userspace to detect support for asymmetric mode by providing a hwcap for it, using the official feature name FEAT_MTE3. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Vincenzo Frascino <Vincenzo.Frascino@arm.com> Tested-by: Branislav Rankov <branislav.rankov@arm.com> Link: https://lore.kernel.org/r/20220216173224.2342152-4-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
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@ -259,6 +259,11 @@ HWCAP2_RPRES
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Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
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HWCAP2_MTE3
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Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described
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by Documentation/arm64/memory-tagging-extension.rst.
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4. Unused AT_HWCAP bits
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-----------------------
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@ -108,6 +108,7 @@
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#define KERNEL_HWCAP_ECV __khwcap2_feature(ECV)
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#define KERNEL_HWCAP_AFP __khwcap2_feature(AFP)
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#define KERNEL_HWCAP_RPRES __khwcap2_feature(RPRES)
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#define KERNEL_HWCAP_MTE3 __khwcap2_feature(MTE3)
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/*
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* This yields a mask that user programs can use to figure out what
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@ -78,5 +78,6 @@
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#define HWCAP2_ECV (1 << 19)
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#define HWCAP2_AFP (1 << 20)
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#define HWCAP2_RPRES (1 << 21)
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#define HWCAP2_MTE3 (1 << 22)
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#endif /* _UAPI__ASM_HWCAP_H */
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@ -2488,6 +2488,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
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#endif
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#ifdef CONFIG_ARM64_MTE
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HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE),
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HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE_ASYMM, CAP_HWCAP, KERNEL_HWCAP_MTE3),
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#endif /* CONFIG_ARM64_MTE */
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HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV),
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HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP),
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@ -97,6 +97,7 @@ static const char *const hwcap_str[] = {
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[KERNEL_HWCAP_ECV] = "ecv",
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[KERNEL_HWCAP_AFP] = "afp",
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[KERNEL_HWCAP_RPRES] = "rpres",
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[KERNEL_HWCAP_MTE3] = "mte3",
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};
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#ifdef CONFIG_COMPAT
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