Update extcon for v5.2
Detailed description for this pull request: 1. Add new extcon-intel-mrfld.c extcon provider driver - On Intel Merrifield the Basin Cove PMIC provides a feature to detect the USB connection type. This driver utilizes the feature in order to support the USB dual role detection. 2. Update the extcon provider drivers - For extcon-intel-cht-wc.c, make charger detection co-existed with OTG host mode and enable external charger. - For intel extcon driver, add common header file (extcon-intel.h) in order to remove the duplicate definitions. - For extcon-arizonal.c, disable microphone detection on driver removal. 3. - Edit comment of extcon_unregister_notifer() to fix a build warning - Add CONFIG_ACPI dependency to Kconfig to fix a build error for extcon-axp.c -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcvqcQAAoJEJzN3yze689T6UEQANPjmAQIkt/nWRyDnq48c/JE dCUCqJmrYKqbqrviij8Jp5Y7lJqJTY0cWaCBWGS8pA7XtcjhFzKJRTFHI0J4RgDw qUpkSgwUwf2gfPuL0Q2qq66xrrwqird6qUFKsBw8VaUBsV3WOQaM9G8dvyuywFaF wS7f7Uohl9ZjzIFP/q4uUMLFIWb86GIzHcfd99BkWMVTW0tUfP10lEwAQjcat9hg jiz1tjpLwCc5UUjjrdMw7hZY+Iax6PH2kHjpHkxW62dBYp4+ch9/zaF20We7LFDV buMLJupGsi0a+ucb7kRTjmWqmICD5mEBqEG9pjGDvkmt+VKnvDQnwGj8nJKEObVT 3zD8zX7y4zZYYtzH9PWFwFcOD5+BKLku07bsit86eXJUE0wmBZ/JKCmnpyqERDno MAr8GqnWCZ2A9VEjpggNzjXs7OJu4XBimmJRTbe5lKsEfAGh071errI8ZZ1u+8hZ rCLrSenpzMRwg5MfPiP5pAEqGyr8W2mka9Pz9fKZhipHeI4nbbEG26LZzGyNE8sR /NJdx+fKbzEUj53EXpSfL6SFtFJJMvDPXit0VnlKjLNXg+sKmwq51xNk/q8vNF7z IxD5WdNc/Gin3exYRs+hnu0bTwQPkUCJWL76xs+hVHsS1NpTre2NkPdUw8h1wqjG mcyadxFfrXtWhnpmPxV6 =KYxm -----END PGP SIGNATURE----- Merge tag 'extcon-next-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next Chanwoo writes: Update extcon for v5.2 Detailed description for this pull request: 1. Add new extcon-intel-mrfld.c extcon provider driver - On Intel Merrifield the Basin Cove PMIC provides a feature to detect the USB connection type. This driver utilizes the feature in order to support the USB dual role detection. 2. Update the extcon provider drivers - For extcon-intel-cht-wc.c, make charger detection co-existed with OTG host mode and enable external charger. - For intel extcon driver, add common header file (extcon-intel.h) in order to remove the duplicate definitions. - For extcon-arizonal.c, disable microphone detection on driver removal. 3. - Edit comment of extcon_unregister_notifer() to fix a build warning - Add CONFIG_ACPI dependency to Kconfig to fix a build error for extcon-axp.c * tag 'extcon-next-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon: extcon: arizona: Disable mic detect if running when driver is removed extcon: axp288: Add a depends on ACPI to the Kconfig entry extcon: mrfld: Introduce extcon driver for Basin Cove PMIC extcon: intel: Split out some definitions to a common header extcon: Fix build warning for extcon_unregister_notifier comment extcon: intel-cht-wc: Enable external charger extcon: intel-cht-wc: Make charger detection co-existed with OTG host mode
This commit is contained in:
Greg Kroah-Hartman
commit
cf7eb03333
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@ -30,7 +30,7 @@ config EXTCON_ARIZONA
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config EXTCON_AXP288
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tristate "X-Power AXP288 EXTCON support"
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depends on MFD_AXP20X && USB_SUPPORT && X86
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depends on MFD_AXP20X && USB_SUPPORT && X86 && ACPI
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select USB_ROLE_SWITCH
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help
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Say Y here to enable support for USB peripheral detection
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@ -60,6 +60,13 @@ config EXTCON_INTEL_CHT_WC
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Say Y here to enable extcon support for charger detection / control
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on the Intel Cherrytrail Whiskey Cove PMIC.
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config EXTCON_INTEL_MRFLD
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tristate "Intel Merrifield Basin Cove PMIC extcon driver"
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depends on INTEL_SOC_PMIC_MRFLD
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help
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Say Y here to enable extcon support for charger detection / control
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on the Intel Merrifield Basin Cove PMIC.
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config EXTCON_MAX14577
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tristate "Maxim MAX14577/77836 EXTCON Support"
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depends on MFD_MAX14577
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@ -11,6 +11,7 @@ obj-$(CONFIG_EXTCON_AXP288) += extcon-axp288.o
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obj-$(CONFIG_EXTCON_GPIO) += extcon-gpio.o
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obj-$(CONFIG_EXTCON_INTEL_INT3496) += extcon-intel-int3496.o
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obj-$(CONFIG_EXTCON_INTEL_CHT_WC) += extcon-intel-cht-wc.o
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obj-$(CONFIG_EXTCON_INTEL_MRFLD) += extcon-intel-mrfld.o
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obj-$(CONFIG_EXTCON_MAX14577) += extcon-max14577.o
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obj-$(CONFIG_EXTCON_MAX3355) += extcon-max3355.o
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obj-$(CONFIG_EXTCON_MAX77693) += extcon-max77693.o
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@ -205,7 +205,7 @@ EXPORT_SYMBOL(devm_extcon_register_notifier);
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/**
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* devm_extcon_unregister_notifier()
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- Resource-managed extcon_unregister_notifier()
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* - Resource-managed extcon_unregister_notifier()
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* @dev: the device owning the extcon device being created
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* @edev: the extcon device
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* @id: the unique id among the extcon enumeration
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@ -1726,6 +1726,16 @@ static int arizona_extcon_remove(struct platform_device *pdev)
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struct arizona_extcon_info *info = platform_get_drvdata(pdev);
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struct arizona *arizona = info->arizona;
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int jack_irq_rise, jack_irq_fall;
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bool change;
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regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1,
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ARIZONA_MICD_ENA, 0,
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&change);
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if (change) {
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regulator_disable(info->micvdd);
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pm_runtime_put(info->dev);
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}
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gpiod_put(info->micd_pol_gpio);
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@ -17,6 +17,8 @@
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "extcon-intel.h"
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#define CHT_WC_PHYCTRL 0x5e07
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#define CHT_WC_CHGRCTRL0 0x5e16
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@ -30,6 +32,14 @@
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#define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
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#define CHT_WC_CHGRCTRL1 0x5e17
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#define CHT_WC_CHGRCTRL1_FUSB_INLMT_100 BIT(0)
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#define CHT_WC_CHGRCTRL1_FUSB_INLMT_150 BIT(1)
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#define CHT_WC_CHGRCTRL1_FUSB_INLMT_500 BIT(2)
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#define CHT_WC_CHGRCTRL1_FUSB_INLMT_900 BIT(3)
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#define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500 BIT(4)
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#define CHT_WC_CHGRCTRL1_FTEMP_EVENT BIT(5)
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#define CHT_WC_CHGRCTRL1_OTGMODE BIT(6)
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#define CHT_WC_CHGRCTRL1_DBPEN BIT(7)
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#define CHT_WC_USBSRC 0x5e29
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#define CHT_WC_USBSRC_STS_MASK GENMASK(1, 0)
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@ -48,6 +58,13 @@
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#define CHT_WC_USBSRC_TYPE_OTHER 8
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#define CHT_WC_USBSRC_TYPE_DCP_EXTPHY 9
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#define CHT_WC_CHGDISCTRL 0x5e2f
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#define CHT_WC_CHGDISCTRL_OUT BIT(0)
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/* 0 - open drain, 1 - regular push-pull output */
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#define CHT_WC_CHGDISCTRL_DRV BIT(4)
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/* 0 - pin is controlled by SW, 1 - by HW */
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#define CHT_WC_CHGDISCTRL_FN BIT(6)
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#define CHT_WC_PWRSRC_IRQ 0x6e03
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#define CHT_WC_PWRSRC_IRQ_MASK 0x6e0f
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#define CHT_WC_PWRSRC_STS 0x6e1e
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@ -65,15 +82,6 @@
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#define CHT_WC_VBUS_GPIO_CTLO_DRV_OD BIT(4)
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#define CHT_WC_VBUS_GPIO_CTLO_DIR_OUT BIT(5)
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enum cht_wc_usb_id {
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USB_ID_OTG,
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USB_ID_GND,
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USB_ID_FLOAT,
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USB_RID_A,
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USB_RID_B,
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USB_RID_C,
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};
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enum cht_wc_mux_select {
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MUX_SEL_PMIC = 0,
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MUX_SEL_SOC,
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@ -101,9 +109,9 @@ static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts)
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{
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switch ((pwrsrc_sts & CHT_WC_PWRSRC_USBID_MASK) >> CHT_WC_PWRSRC_USBID_SHIFT) {
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case CHT_WC_PWRSRC_RID_GND:
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return USB_ID_GND;
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return INTEL_USB_ID_GND;
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case CHT_WC_PWRSRC_RID_FLOAT:
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return USB_ID_FLOAT;
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return INTEL_USB_ID_FLOAT;
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case CHT_WC_PWRSRC_RID_ACA:
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default:
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/*
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@ -111,7 +119,7 @@ static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts)
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* the USBID GPADC channel here and determine ACA role
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* based on that.
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*/
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return USB_ID_FLOAT;
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return INTEL_USB_ID_FLOAT;
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}
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}
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@ -198,6 +206,30 @@ static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext,
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dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret);
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}
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static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext,
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bool enable)
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{
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unsigned int val = enable ? CHT_WC_CHGRCTRL1_OTGMODE : 0;
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int ret;
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ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL1,
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CHT_WC_CHGRCTRL1_OTGMODE, val);
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if (ret)
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dev_err(ext->dev, "Error updating CHGRCTRL1 reg: %d\n", ret);
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}
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static void cht_wc_extcon_enable_charging(struct cht_wc_extcon_data *ext,
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bool enable)
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{
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unsigned int val = enable ? 0 : CHT_WC_CHGDISCTRL_OUT;
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int ret;
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ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
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CHT_WC_CHGDISCTRL_OUT, val);
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if (ret)
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dev_err(ext->dev, "Error updating CHGDISCTRL reg: %d\n", ret);
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}
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/* Small helper to sync EXTCON_CHG_USB_SDP and EXTCON_USB state */
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static void cht_wc_extcon_set_state(struct cht_wc_extcon_data *ext,
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unsigned int cable, bool state)
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@ -221,11 +253,17 @@ static void cht_wc_extcon_pwrsrc_event(struct cht_wc_extcon_data *ext)
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}
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id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
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if (id == USB_ID_GND) {
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if (id == INTEL_USB_ID_GND) {
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cht_wc_extcon_enable_charging(ext, false);
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cht_wc_extcon_set_otgmode(ext, true);
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/* The 5v boost causes a false VBUS / SDP detect, skip */
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goto charger_det_done;
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}
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cht_wc_extcon_set_otgmode(ext, false);
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cht_wc_extcon_enable_charging(ext, true);
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/* Plugged into a host/charger or not connected? */
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if (!(pwrsrc_sts & CHT_WC_PWRSRC_VBUS)) {
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/* Route D+ and D- to PMIC for future charger detection */
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@ -248,7 +286,7 @@ set_state:
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ext->previous_cable = cable;
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}
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ext->usb_host = ((id == USB_ID_GND) || (id == USB_RID_A));
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ext->usb_host = ((id == INTEL_USB_ID_GND) || (id == INTEL_USB_RID_A));
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extcon_set_state_sync(ext->edev, EXTCON_USB_HOST, ext->usb_host);
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}
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@ -278,6 +316,14 @@ static int cht_wc_extcon_sw_control(struct cht_wc_extcon_data *ext, bool enable)
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{
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int ret, mask, val;
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val = enable ? 0 : CHT_WC_CHGDISCTRL_FN;
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ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
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CHT_WC_CHGDISCTRL_FN, val);
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if (ret)
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dev_err(ext->dev,
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"Error setting sw control for CHGDIS pin: %d\n",
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ret);
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mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF;
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val = enable ? mask : 0;
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ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL0, mask, val);
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@ -329,7 +375,10 @@ static int cht_wc_extcon_probe(struct platform_device *pdev)
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/* Enable sw control */
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ret = cht_wc_extcon_sw_control(ext, true);
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if (ret)
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return ret;
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goto disable_sw_control;
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/* Disable charging by external battery charger */
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cht_wc_extcon_enable_charging(ext, false);
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/* Register extcon device */
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ret = devm_extcon_dev_register(ext->dev, ext->edev);
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@ -0,0 +1,284 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* extcon driver for Basin Cove PMIC
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*
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* Copyright (c) 2019, Intel Corporation.
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*/
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#include <linux/extcon-provider.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/mfd/intel_soc_pmic_mrfld.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "extcon-intel.h"
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#define BCOVE_USBIDCTRL 0x19
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#define BCOVE_USBIDCTRL_ID BIT(0)
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#define BCOVE_USBIDCTRL_ACA BIT(1)
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#define BCOVE_USBIDCTRL_ALL (BCOVE_USBIDCTRL_ID | BCOVE_USBIDCTRL_ACA)
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#define BCOVE_USBIDSTS 0x1a
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#define BCOVE_USBIDSTS_GND BIT(0)
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#define BCOVE_USBIDSTS_RARBRC_MASK GENMASK(2, 1)
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#define BCOVE_USBIDSTS_RARBRC_SHIFT 1
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#define BCOVE_USBIDSTS_NO_ACA 0
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#define BCOVE_USBIDSTS_R_ID_A 1
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#define BCOVE_USBIDSTS_R_ID_B 2
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#define BCOVE_USBIDSTS_R_ID_C 3
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#define BCOVE_USBIDSTS_FLOAT BIT(3)
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#define BCOVE_USBIDSTS_SHORT BIT(4)
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#define BCOVE_CHGRIRQ_ALL (BCOVE_CHGRIRQ_VBUSDET | BCOVE_CHGRIRQ_DCDET | \
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BCOVE_CHGRIRQ_BATTDET | BCOVE_CHGRIRQ_USBIDDET)
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#define BCOVE_CHGRCTRL0 0x4b
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#define BCOVE_CHGRCTRL0_CHGRRESET BIT(0)
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#define BCOVE_CHGRCTRL0_EMRGCHREN BIT(1)
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#define BCOVE_CHGRCTRL0_EXTCHRDIS BIT(2)
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#define BCOVE_CHGRCTRL0_SWCONTROL BIT(3)
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#define BCOVE_CHGRCTRL0_TTLCK BIT(4)
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#define BCOVE_CHGRCTRL0_BIT_5 BIT(5)
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#define BCOVE_CHGRCTRL0_BIT_6 BIT(6)
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#define BCOVE_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
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struct mrfld_extcon_data {
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struct device *dev;
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struct regmap *regmap;
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struct extcon_dev *edev;
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unsigned int status;
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unsigned int id;
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};
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static const unsigned int mrfld_extcon_cable[] = {
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EXTCON_USB,
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EXTCON_USB_HOST,
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EXTCON_CHG_USB_SDP,
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EXTCON_CHG_USB_CDP,
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EXTCON_CHG_USB_DCP,
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EXTCON_CHG_USB_ACA,
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EXTCON_NONE,
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};
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static int mrfld_extcon_clear(struct mrfld_extcon_data *data, unsigned int reg,
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unsigned int mask)
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{
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return regmap_update_bits(data->regmap, reg, mask, 0x00);
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}
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static int mrfld_extcon_set(struct mrfld_extcon_data *data, unsigned int reg,
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unsigned int mask)
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{
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return regmap_update_bits(data->regmap, reg, mask, 0xff);
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}
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static int mrfld_extcon_sw_control(struct mrfld_extcon_data *data, bool enable)
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{
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unsigned int mask = BCOVE_CHGRCTRL0_SWCONTROL;
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struct device *dev = data->dev;
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int ret;
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if (enable)
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ret = mrfld_extcon_set(data, BCOVE_CHGRCTRL0, mask);
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else
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ret = mrfld_extcon_clear(data, BCOVE_CHGRCTRL0, mask);
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if (ret)
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dev_err(dev, "can't set SW control: %d\n", ret);
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return ret;
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}
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static int mrfld_extcon_get_id(struct mrfld_extcon_data *data)
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{
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struct regmap *regmap = data->regmap;
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unsigned int id;
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bool ground;
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int ret;
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ret = regmap_read(regmap, BCOVE_USBIDSTS, &id);
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if (ret)
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return ret;
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if (id & BCOVE_USBIDSTS_FLOAT)
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return INTEL_USB_ID_FLOAT;
|
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|
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switch ((id & BCOVE_USBIDSTS_RARBRC_MASK) >> BCOVE_USBIDSTS_RARBRC_SHIFT) {
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case BCOVE_USBIDSTS_R_ID_A:
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return INTEL_USB_RID_A;
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case BCOVE_USBIDSTS_R_ID_B:
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return INTEL_USB_RID_B;
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case BCOVE_USBIDSTS_R_ID_C:
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return INTEL_USB_RID_C;
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}
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/*
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* PMIC A0 reports USBIDSTS_GND = 1 for ID_GND,
|
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* but PMIC B0 reports USBIDSTS_GND = 0 for ID_GND.
|
||||
* Thus we must check this bit at last.
|
||||
*/
|
||||
ground = id & BCOVE_USBIDSTS_GND;
|
||||
switch ('A' + BCOVE_MAJOR(data->id)) {
|
||||
case 'A':
|
||||
return ground ? INTEL_USB_ID_GND : INTEL_USB_ID_FLOAT;
|
||||
case 'B':
|
||||
return ground ? INTEL_USB_ID_FLOAT : INTEL_USB_ID_GND;
|
||||
}
|
||||
|
||||
/* Unknown or unsupported type */
|
||||
return INTEL_USB_ID_FLOAT;
|
||||
}
|
||||
|
||||
static int mrfld_extcon_role_detect(struct mrfld_extcon_data *data)
|
||||
{
|
||||
unsigned int id;
|
||||
bool usb_host;
|
||||
int ret;
|
||||
|
||||
ret = mrfld_extcon_get_id(data);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
id = ret;
|
||||
|
||||
usb_host = (id == INTEL_USB_ID_GND) || (id == INTEL_USB_RID_A);
|
||||
extcon_set_state_sync(data->edev, EXTCON_USB_HOST, usb_host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mrfld_extcon_cable_detect(struct mrfld_extcon_data *data)
|
||||
{
|
||||
struct regmap *regmap = data->regmap;
|
||||
unsigned int status, change;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* It seems SCU firmware clears the content of BCOVE_CHGRIRQ1
|
||||
* and makes it useless for OS. Instead we compare a previously
|
||||
* stored status to the current one, provided by BCOVE_SCHGRIRQ1.
|
||||
*/
|
||||
ret = regmap_read(regmap, BCOVE_SCHGRIRQ1, &status);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
change = status ^ data->status;
|
||||
if (!change)
|
||||
return -ENODATA;
|
||||
|
||||
if (change & BCOVE_CHGRIRQ_USBIDDET) {
|
||||
ret = mrfld_extcon_role_detect(data);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
data->status = status;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t mrfld_extcon_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct mrfld_extcon_data *data = dev_id;
|
||||
int ret;
|
||||
|
||||
ret = mrfld_extcon_cable_detect(data);
|
||||
|
||||
mrfld_extcon_clear(data, BCOVE_MIRQLVL1, BCOVE_LVL1_CHGR);
|
||||
|
||||
return ret ? IRQ_NONE: IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int mrfld_extcon_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct intel_soc_pmic *pmic = dev_get_drvdata(dev->parent);
|
||||
struct regmap *regmap = pmic->regmap;
|
||||
struct mrfld_extcon_data *data;
|
||||
unsigned int id;
|
||||
int irq, ret;
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0)
|
||||
return irq;
|
||||
|
||||
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
data->dev = dev;
|
||||
data->regmap = regmap;
|
||||
|
||||
data->edev = devm_extcon_dev_allocate(dev, mrfld_extcon_cable);
|
||||
if (IS_ERR(data->edev))
|
||||
return -ENOMEM;
|
||||
|
||||
ret = devm_extcon_dev_register(dev, data->edev);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "can't register extcon device: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(dev, irq, NULL, mrfld_extcon_interrupt,
|
||||
IRQF_ONESHOT | IRQF_SHARED, pdev->name,
|
||||
data);
|
||||
if (ret) {
|
||||
dev_err(dev, "can't register IRQ handler: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regmap_read(regmap, BCOVE_ID, &id);
|
||||
if (ret) {
|
||||
dev_err(dev, "can't read PMIC ID: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
data->id = id;
|
||||
|
||||
ret = mrfld_extcon_sw_control(data, true);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Get initial state */
|
||||
mrfld_extcon_role_detect(data);
|
||||
|
||||
mrfld_extcon_clear(data, BCOVE_MIRQLVL1, BCOVE_LVL1_CHGR);
|
||||
mrfld_extcon_clear(data, BCOVE_MCHGRIRQ1, BCOVE_CHGRIRQ_ALL);
|
||||
|
||||
mrfld_extcon_set(data, BCOVE_USBIDCTRL, BCOVE_USBIDCTRL_ALL);
|
||||
|
||||
platform_set_drvdata(pdev, data);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mrfld_extcon_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct mrfld_extcon_data *data = platform_get_drvdata(pdev);
|
||||
|
||||
mrfld_extcon_sw_control(data, false);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct platform_device_id mrfld_extcon_id_table[] = {
|
||||
{ .name = "mrfld_bcove_pwrsrc" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, mrfld_extcon_id_table);
|
||||
|
||||
static struct platform_driver mrfld_extcon_driver = {
|
||||
.driver = {
|
||||
.name = "mrfld_bcove_pwrsrc",
|
||||
},
|
||||
.probe = mrfld_extcon_probe,
|
||||
.remove = mrfld_extcon_remove,
|
||||
.id_table = mrfld_extcon_id_table,
|
||||
};
|
||||
module_platform_driver(mrfld_extcon_driver);
|
||||
|
||||
MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
|
||||
MODULE_DESCRIPTION("extcon driver for Intel Merrifield Basin Cove PMIC");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Header file for Intel extcon hardware
|
||||
*
|
||||
* Copyright (C) 2019 Intel Corporation. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __EXTCON_INTEL_H__
|
||||
#define __EXTCON_INTEL_H__
|
||||
|
||||
enum extcon_intel_usb_id {
|
||||
INTEL_USB_ID_OTG,
|
||||
INTEL_USB_ID_GND,
|
||||
INTEL_USB_ID_FLOAT,
|
||||
INTEL_USB_RID_A,
|
||||
INTEL_USB_RID_B,
|
||||
INTEL_USB_RID_C,
|
||||
};
|
||||
|
||||
#endif /* __EXTCON_INTEL_H__ */
|
||||
Loading…
Reference in New Issue