[SPARC]: Beginnings of generic of_device framework.
The idea is to fully construct the device register and interrupt values into these of_device objects, and convert all of SBUS, EBUS, ISA drivers to use this new stuff. Much ideas and code taken from Ben H.'s powerpc work. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
David S. Miller
parent
3ae9a3489a
commit
cf44bbc26c
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@ -153,10 +153,424 @@ struct bus_type sbus_bus_type = {
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EXPORT_SYMBOL(sbus_bus_type);
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#endif
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struct bus_type of_bus_type = {
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.name = "of",
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.match = of_platform_bus_match,
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.probe = of_device_probe,
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.remove = of_device_remove,
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.suspend = of_device_suspend,
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.resume = of_device_resume,
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};
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EXPORT_SYMBOL(of_bus_type);
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static inline u64 of_read_addr(u32 *cell, int size)
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{
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u64 r = 0;
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while (size--)
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r = (r << 32) | *(cell++);
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return r;
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}
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static void __init get_cells(struct device_node *dp,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = of_n_addr_cells(dp);
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if (sizec)
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*sizec = of_n_size_cells(dp);
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}
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/* Max address size we deal with */
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#define OF_MAX_ADDR_CELLS 4
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struct of_bus {
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const char *name;
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const char *addr_prop_name;
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int (*match)(struct device_node *parent);
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void (*count_cells)(struct device_node *child,
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int *addrc, int *sizec);
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u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
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int (*translate)(u32 *addr, u64 offset, int na);
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unsigned int (*get_flags)(u32 *addr);
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};
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/*
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* Default translator (generic bus)
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*/
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static void of_bus_default_count_cells(struct device_node *dev,
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int *addrc, int *sizec)
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{
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get_cells(dev, addrc, sizec);
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}
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static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
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{
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u64 cp, s, da;
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cp = of_read_addr(range, na);
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s = of_read_addr(range + na + pna, ns);
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da = of_read_addr(addr, na);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_default_translate(u32 *addr, u64 offset, int na)
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{
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u64 a = of_read_addr(addr, na);
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memset(addr, 0, na * 4);
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a += offset;
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if (na > 1)
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addr[na - 2] = a >> 32;
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addr[na - 1] = a & 0xffffffffu;
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return 0;
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}
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static unsigned int of_bus_default_get_flags(u32 *addr)
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{
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return IORESOURCE_MEM;
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}
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/*
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* PCI bus specific translator
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*/
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static int of_bus_pci_match(struct device_node *np)
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{
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return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
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}
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static void of_bus_pci_count_cells(struct device_node *np,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 3;
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if (sizec)
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*sizec = 2;
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}
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static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
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{
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u64 cp, s, da;
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/* Check address type match */
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if ((addr[0] ^ range[0]) & 0x03000000)
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return OF_BAD_ADDR;
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/* Read address values, skipping high cell */
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cp = of_read_addr(range + 1, na - 1);
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s = of_read_addr(range + na + pna, ns);
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da = of_read_addr(addr + 1, na - 1);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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static unsigned int of_bus_pci_get_flags(u32 *addr)
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{
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unsigned int flags = 0;
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u32 w = addr[0];
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switch((w >> 24) & 0x03) {
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case 0x01:
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flags |= IORESOURCE_IO;
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case 0x02: /* 32 bits */
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case 0x03: /* 64 bits */
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flags |= IORESOURCE_MEM;
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}
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if (w & 0x40000000)
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flags |= IORESOURCE_PREFETCH;
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return flags;
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}
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/*
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* SBUS bus specific translator
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*/
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static int of_bus_sbus_match(struct device_node *np)
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{
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return !strcmp(np->name, "sbus") ||
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!strcmp(np->name, "sbi");
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}
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static void of_bus_sbus_count_cells(struct device_node *child,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 2;
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if (sizec)
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*sizec = 1;
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}
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static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
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{
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return of_bus_default_map(addr, range, na, ns, pna);
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}
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static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr, offset, na);
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}
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static unsigned int of_bus_sbus_get_flags(u32 *addr)
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{
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return IORESOURCE_MEM;
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}
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/*
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* Array of bus specific translators
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*/
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static struct of_bus of_busses[] = {
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/* PCI */
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{
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.name = "pci",
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.addr_prop_name = "assigned-addresses",
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.match = of_bus_pci_match,
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.count_cells = of_bus_pci_count_cells,
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.map = of_bus_pci_map,
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.translate = of_bus_pci_translate,
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.get_flags = of_bus_pci_get_flags,
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},
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/* SBUS */
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{
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.name = "sbus",
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.addr_prop_name = "reg",
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.match = of_bus_sbus_match,
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.count_cells = of_bus_sbus_count_cells,
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.map = of_bus_sbus_map,
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.translate = of_bus_sbus_translate,
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.get_flags = of_bus_sbus_get_flags,
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},
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/* Default */
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{
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.name = "default",
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.addr_prop_name = "reg",
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.match = NULL,
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.count_cells = of_bus_default_count_cells,
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.map = of_bus_default_map,
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.translate = of_bus_default_translate,
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.get_flags = of_bus_default_get_flags,
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},
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};
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static struct of_bus *of_match_bus(struct device_node *np)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
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if (!of_busses[i].match || of_busses[i].match(np))
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return &of_busses[i];
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BUG();
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return NULL;
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}
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static int __init build_one_resource(struct device_node *parent,
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struct of_bus *bus,
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struct of_bus *pbus,
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u32 *addr,
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int na, int ns, int pna)
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{
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u32 *ranges;
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unsigned int rlen;
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int rone;
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u64 offset = OF_BAD_ADDR;
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ranges = of_get_property(parent, "ranges", &rlen);
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if (ranges == NULL || rlen == 0) {
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offset = of_read_addr(addr, na);
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memset(addr, 0, pna * 4);
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goto finish;
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}
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/* Now walk through the ranges */
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rlen /= 4;
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rone = na + pna + ns;
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for (; rlen >= rone; rlen -= rone, ranges += rone) {
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offset = bus->map(addr, ranges, na, ns, pna);
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if (offset != OF_BAD_ADDR)
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break;
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}
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if (offset == OF_BAD_ADDR)
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return 1;
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memcpy(addr, ranges + na, 4 * pna);
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finish:
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/* Translate it into parent bus space */
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return pbus->translate(addr, offset, pna);
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}
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static void __init build_device_resources(struct of_device *op,
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struct device *parent)
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{
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struct of_device *p_op;
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struct of_bus *bus;
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int na, ns;
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int index, num_reg;
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void *preg;
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if (!parent)
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return;
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p_op = to_of_device(parent);
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bus = of_match_bus(p_op->node);
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bus->count_cells(op->node, &na, &ns);
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preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
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if (!preg || num_reg == 0)
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return;
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/* Convert to num-cells. */
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num_reg /= 4;
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/* Conver to num-entries. */
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num_reg /= na + ns;
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for (index = 0; index < num_reg; index++) {
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struct resource *r = &op->resource[index];
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u32 addr[OF_MAX_ADDR_CELLS];
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u32 *reg = (preg + (index * ((na + ns) * 4)));
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struct device_node *dp = op->node;
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struct device_node *pp = p_op->node;
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struct of_bus *pbus;
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u64 size, result = OF_BAD_ADDR;
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unsigned long flags;
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int dna, dns;
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int pna, pns;
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size = of_read_addr(reg + na, ns);
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flags = bus->get_flags(reg);
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memcpy(addr, reg, na * 4);
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/* If the immediate parent has no ranges property to apply,
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* just use a 1<->1 mapping.
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*/
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if (of_find_property(pp, "ranges", NULL) == NULL) {
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result = of_read_addr(addr, na);
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goto build_res;
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}
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dna = na;
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dns = ns;
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while (1) {
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dp = pp;
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pp = dp->parent;
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if (!pp) {
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result = of_read_addr(addr, dna);
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break;
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}
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pbus = of_match_bus(pp);
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pbus->count_cells(dp, &pna, &pns);
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if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
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break;
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dna = pna;
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dns = pns;
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bus = pbus;
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}
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build_res:
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memset(r, 0, sizeof(*r));
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if (result != OF_BAD_ADDR) {
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r->start = result;
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r->end = result + size - 1;
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r->flags = flags;
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} else {
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r->start = ~0UL;
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r->end = ~0UL;
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}
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r->name = op->node->name;
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}
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}
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static struct of_device * __init scan_one_device(struct device_node *dp,
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struct device *parent)
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{
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struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
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unsigned int *irq;
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int len;
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if (!op)
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return NULL;
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op->node = dp;
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op->clock_freq = of_getintprop_default(dp, "clock-frequency",
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(25*1000*1000));
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op->portid = of_getintprop_default(dp, "upa-portid", -1);
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if (op->portid == -1)
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op->portid = of_getintprop_default(dp, "portid", -1);
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irq = of_get_property(dp, "interrupts", &len);
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if (irq)
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op->irq = *irq;
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else
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op->irq = 0xffffffff;
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build_device_resources(op, parent);
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op->dev.parent = parent;
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op->dev.bus = &of_bus_type;
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if (!parent)
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strcpy(op->dev.bus_id, "root");
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else
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strcpy(op->dev.bus_id, dp->path_component_name);
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if (of_device_register(op)) {
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printk("%s: Could not register of device.\n",
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dp->full_name);
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kfree(op);
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op = NULL;
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}
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return op;
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}
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static void __init scan_tree(struct device_node *dp, struct device *parent)
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{
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while (dp) {
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struct of_device *op = scan_one_device(dp, parent);
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if (op)
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scan_tree(dp->child, &op->dev);
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dp = dp->sibling;
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}
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}
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static void __init scan_of_devices(void)
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{
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struct device_node *root = of_find_node_by_path("/");
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struct of_device *parent;
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parent = scan_one_device(root, NULL);
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if (!parent)
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return;
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scan_tree(root->child, &parent->dev);
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}
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static int __init of_bus_driver_init(void)
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{
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int err = 0;
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int err;
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err = bus_register(&of_bus_type);
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#ifdef CONFIG_PCI
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if (!err)
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err = bus_register(&ebus_bus_type);
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@ -165,7 +579,11 @@ static int __init of_bus_driver_init(void)
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if (!err)
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err = bus_register(&sbus_bus_type);
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#endif
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return 0;
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if (!err)
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scan_of_devices();
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return err;
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}
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postcore_initcall(of_bus_driver_init);
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|
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@ -163,10 +163,492 @@ struct bus_type sbus_bus_type = {
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EXPORT_SYMBOL(sbus_bus_type);
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#endif
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struct bus_type of_bus_type = {
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.name = "of",
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.match = of_platform_bus_match,
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.probe = of_device_probe,
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.remove = of_device_remove,
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.suspend = of_device_suspend,
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.resume = of_device_resume,
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};
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EXPORT_SYMBOL(of_bus_type);
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static inline u64 of_read_addr(u32 *cell, int size)
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{
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u64 r = 0;
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while (size--)
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r = (r << 32) | *(cell++);
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return r;
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}
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static void __init get_cells(struct device_node *dp,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = of_n_addr_cells(dp);
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if (sizec)
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*sizec = of_n_size_cells(dp);
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}
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/* Max address size we deal with */
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#define OF_MAX_ADDR_CELLS 4
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struct of_bus {
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const char *name;
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const char *addr_prop_name;
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int (*match)(struct device_node *parent);
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void (*count_cells)(struct device_node *child,
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int *addrc, int *sizec);
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u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
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int (*translate)(u32 *addr, u64 offset, int na);
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unsigned int (*get_flags)(u32 *addr);
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};
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/*
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* Default translator (generic bus)
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*/
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static void of_bus_default_count_cells(struct device_node *dev,
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int *addrc, int *sizec)
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{
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get_cells(dev, addrc, sizec);
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}
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static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
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{
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u64 cp, s, da;
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cp = of_read_addr(range, na);
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s = of_read_addr(range + na + pna, ns);
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da = of_read_addr(addr, na);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_default_translate(u32 *addr, u64 offset, int na)
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{
|
||||
u64 a = of_read_addr(addr, na);
|
||||
memset(addr, 0, na * 4);
|
||||
a += offset;
|
||||
if (na > 1)
|
||||
addr[na - 2] = a >> 32;
|
||||
addr[na - 1] = a & 0xffffffffu;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int of_bus_default_get_flags(u32 *addr)
|
||||
{
|
||||
return IORESOURCE_MEM;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* PCI bus specific translator
|
||||
*/
|
||||
|
||||
static int of_bus_pci_match(struct device_node *np)
|
||||
{
|
||||
return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
|
||||
}
|
||||
|
||||
static void of_bus_pci_count_cells(struct device_node *np,
|
||||
int *addrc, int *sizec)
|
||||
{
|
||||
if (addrc)
|
||||
*addrc = 3;
|
||||
if (sizec)
|
||||
*sizec = 2;
|
||||
}
|
||||
|
||||
static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
|
||||
{
|
||||
u64 cp, s, da;
|
||||
|
||||
/* Check address type match */
|
||||
if ((addr[0] ^ range[0]) & 0x03000000)
|
||||
return OF_BAD_ADDR;
|
||||
|
||||
/* Read address values, skipping high cell */
|
||||
cp = of_read_addr(range + 1, na - 1);
|
||||
s = of_read_addr(range + na + pna, ns);
|
||||
da = of_read_addr(addr + 1, na - 1);
|
||||
|
||||
if (da < cp || da >= (cp + s))
|
||||
return OF_BAD_ADDR;
|
||||
return da - cp;
|
||||
}
|
||||
|
||||
static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
|
||||
{
|
||||
return of_bus_default_translate(addr + 1, offset, na - 1);
|
||||
}
|
||||
|
||||
static unsigned int of_bus_pci_get_flags(u32 *addr)
|
||||
{
|
||||
unsigned int flags = 0;
|
||||
u32 w = addr[0];
|
||||
|
||||
switch((w >> 24) & 0x03) {
|
||||
case 0x01:
|
||||
flags |= IORESOURCE_IO;
|
||||
case 0x02: /* 32 bits */
|
||||
case 0x03: /* 64 bits */
|
||||
flags |= IORESOURCE_MEM;
|
||||
}
|
||||
if (w & 0x40000000)
|
||||
flags |= IORESOURCE_PREFETCH;
|
||||
return flags;
|
||||
}
|
||||
|
||||
/*
|
||||
* ISA bus specific translator
|
||||
*/
|
||||
|
||||
static int of_bus_isa_match(struct device_node *np)
|
||||
{
|
||||
return !strcmp(np->name, "isa");
|
||||
}
|
||||
|
||||
static void of_bus_isa_count_cells(struct device_node *child,
|
||||
int *addrc, int *sizec)
|
||||
{
|
||||
if (addrc)
|
||||
*addrc = 2;
|
||||
if (sizec)
|
||||
*sizec = 1;
|
||||
}
|
||||
|
||||
static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
|
||||
{
|
||||
u64 cp, s, da;
|
||||
|
||||
/* Check address type match */
|
||||
if ((addr[0] ^ range[0]) & 0x00000001)
|
||||
return OF_BAD_ADDR;
|
||||
|
||||
/* Read address values, skipping high cell */
|
||||
cp = of_read_addr(range + 1, na - 1);
|
||||
s = of_read_addr(range + na + pna, ns);
|
||||
da = of_read_addr(addr + 1, na - 1);
|
||||
|
||||
if (da < cp || da >= (cp + s))
|
||||
return OF_BAD_ADDR;
|
||||
return da - cp;
|
||||
}
|
||||
|
||||
static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
|
||||
{
|
||||
return of_bus_default_translate(addr + 1, offset, na - 1);
|
||||
}
|
||||
|
||||
static unsigned int of_bus_isa_get_flags(u32 *addr)
|
||||
{
|
||||
unsigned int flags = 0;
|
||||
u32 w = addr[0];
|
||||
|
||||
if (w & 1)
|
||||
flags |= IORESOURCE_IO;
|
||||
else
|
||||
flags |= IORESOURCE_MEM;
|
||||
return flags;
|
||||
}
|
||||
|
||||
/*
|
||||
* SBUS bus specific translator
|
||||
*/
|
||||
|
||||
static int of_bus_sbus_match(struct device_node *np)
|
||||
{
|
||||
return !strcmp(np->name, "sbus") ||
|
||||
!strcmp(np->name, "sbi");
|
||||
}
|
||||
|
||||
static void of_bus_sbus_count_cells(struct device_node *child,
|
||||
int *addrc, int *sizec)
|
||||
{
|
||||
if (addrc)
|
||||
*addrc = 2;
|
||||
if (sizec)
|
||||
*sizec = 1;
|
||||
}
|
||||
|
||||
static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
|
||||
{
|
||||
return of_bus_default_map(addr, range, na, ns, pna);
|
||||
}
|
||||
|
||||
static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
|
||||
{
|
||||
return of_bus_default_translate(addr, offset, na);
|
||||
}
|
||||
|
||||
static unsigned int of_bus_sbus_get_flags(u32 *addr)
|
||||
{
|
||||
return IORESOURCE_MEM;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Array of bus specific translators
|
||||
*/
|
||||
|
||||
static struct of_bus of_busses[] = {
|
||||
/* PCI */
|
||||
{
|
||||
.name = "pci",
|
||||
.addr_prop_name = "assigned-addresses",
|
||||
.match = of_bus_pci_match,
|
||||
.count_cells = of_bus_pci_count_cells,
|
||||
.map = of_bus_pci_map,
|
||||
.translate = of_bus_pci_translate,
|
||||
.get_flags = of_bus_pci_get_flags,
|
||||
},
|
||||
/* ISA */
|
||||
{
|
||||
.name = "isa",
|
||||
.addr_prop_name = "reg",
|
||||
.match = of_bus_isa_match,
|
||||
.count_cells = of_bus_isa_count_cells,
|
||||
.map = of_bus_isa_map,
|
||||
.translate = of_bus_isa_translate,
|
||||
.get_flags = of_bus_isa_get_flags,
|
||||
},
|
||||
/* SBUS */
|
||||
{
|
||||
.name = "sbus",
|
||||
.addr_prop_name = "reg",
|
||||
.match = of_bus_sbus_match,
|
||||
.count_cells = of_bus_sbus_count_cells,
|
||||
.map = of_bus_sbus_map,
|
||||
.translate = of_bus_sbus_translate,
|
||||
.get_flags = of_bus_sbus_get_flags,
|
||||
},
|
||||
/* Default */
|
||||
{
|
||||
.name = "default",
|
||||
.addr_prop_name = "reg",
|
||||
.match = NULL,
|
||||
.count_cells = of_bus_default_count_cells,
|
||||
.map = of_bus_default_map,
|
||||
.translate = of_bus_default_translate,
|
||||
.get_flags = of_bus_default_get_flags,
|
||||
},
|
||||
};
|
||||
|
||||
static struct of_bus *of_match_bus(struct device_node *np)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
|
||||
if (!of_busses[i].match || of_busses[i].match(np))
|
||||
return &of_busses[i];
|
||||
BUG();
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int __init build_one_resource(struct device_node *parent,
|
||||
struct of_bus *bus,
|
||||
struct of_bus *pbus,
|
||||
u32 *addr,
|
||||
int na, int ns, int pna)
|
||||
{
|
||||
u32 *ranges;
|
||||
unsigned int rlen;
|
||||
int rone;
|
||||
u64 offset = OF_BAD_ADDR;
|
||||
|
||||
ranges = of_get_property(parent, "ranges", &rlen);
|
||||
if (ranges == NULL || rlen == 0) {
|
||||
offset = of_read_addr(addr, na);
|
||||
memset(addr, 0, pna * 4);
|
||||
goto finish;
|
||||
}
|
||||
|
||||
/* Now walk through the ranges */
|
||||
rlen /= 4;
|
||||
rone = na + pna + ns;
|
||||
for (; rlen >= rone; rlen -= rone, ranges += rone) {
|
||||
offset = bus->map(addr, ranges, na, ns, pna);
|
||||
if (offset != OF_BAD_ADDR)
|
||||
break;
|
||||
}
|
||||
if (offset == OF_BAD_ADDR)
|
||||
return 1;
|
||||
|
||||
memcpy(addr, ranges + na, 4 * pna);
|
||||
|
||||
finish:
|
||||
/* Translate it into parent bus space */
|
||||
return pbus->translate(addr, offset, pna);
|
||||
}
|
||||
|
||||
static void __init build_device_resources(struct of_device *op,
|
||||
struct device *parent)
|
||||
{
|
||||
struct of_device *p_op;
|
||||
struct of_bus *bus;
|
||||
int na, ns;
|
||||
int index, num_reg;
|
||||
void *preg;
|
||||
|
||||
if (!parent)
|
||||
return;
|
||||
|
||||
p_op = to_of_device(parent);
|
||||
bus = of_match_bus(p_op->node);
|
||||
bus->count_cells(op->node, &na, &ns);
|
||||
|
||||
preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
|
||||
if (!preg || num_reg == 0)
|
||||
return;
|
||||
|
||||
/* Convert to num-cells. */
|
||||
num_reg /= 4;
|
||||
|
||||
/* Conver to num-entries. */
|
||||
num_reg /= na + ns;
|
||||
|
||||
for (index = 0; index < num_reg; index++) {
|
||||
struct resource *r = &op->resource[index];
|
||||
u32 addr[OF_MAX_ADDR_CELLS];
|
||||
u32 *reg = (preg + (index * ((na + ns) * 4)));
|
||||
struct device_node *dp = op->node;
|
||||
struct device_node *pp = p_op->node;
|
||||
struct of_bus *pbus;
|
||||
u64 size, result = OF_BAD_ADDR;
|
||||
unsigned long flags;
|
||||
int dna, dns;
|
||||
int pna, pns;
|
||||
|
||||
size = of_read_addr(reg + na, ns);
|
||||
flags = bus->get_flags(reg);
|
||||
|
||||
memcpy(addr, reg, na * 4);
|
||||
|
||||
/* If the immediate parent has no ranges property to apply,
|
||||
* just use a 1<->1 mapping. Unless it is the 'dma' child
|
||||
* of an isa bus, which must be passed up towards the root.
|
||||
*
|
||||
* Also, don't try to translate PMU bus device registers.
|
||||
*/
|
||||
if ((of_find_property(pp, "ranges", NULL) == NULL &&
|
||||
strcmp(pp->name, "dma") != 0) ||
|
||||
!strcmp(pp->name, "pmu")) {
|
||||
result = of_read_addr(addr, na);
|
||||
goto build_res;
|
||||
}
|
||||
|
||||
dna = na;
|
||||
dns = ns;
|
||||
|
||||
while (1) {
|
||||
dp = pp;
|
||||
pp = dp->parent;
|
||||
if (!pp) {
|
||||
result = of_read_addr(addr, dna);
|
||||
break;
|
||||
}
|
||||
|
||||
pbus = of_match_bus(pp);
|
||||
pbus->count_cells(dp, &pna, &pns);
|
||||
|
||||
if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
|
||||
break;
|
||||
|
||||
dna = pna;
|
||||
dns = pns;
|
||||
bus = pbus;
|
||||
}
|
||||
|
||||
build_res:
|
||||
memset(r, 0, sizeof(*r));
|
||||
if (result != OF_BAD_ADDR) {
|
||||
r->start = result;
|
||||
r->end = result + size - 1;
|
||||
r->flags = flags;
|
||||
} else {
|
||||
r->start = ~0UL;
|
||||
r->end = ~0UL;
|
||||
}
|
||||
r->name = op->node->name;
|
||||
}
|
||||
}
|
||||
|
||||
static struct of_device * __init scan_one_device(struct device_node *dp,
|
||||
struct device *parent)
|
||||
{
|
||||
struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
|
||||
unsigned int *irq;
|
||||
int len;
|
||||
|
||||
if (!op)
|
||||
return NULL;
|
||||
|
||||
op->node = dp;
|
||||
|
||||
op->clock_freq = of_getintprop_default(dp, "clock-frequency",
|
||||
(25*1000*1000));
|
||||
op->portid = of_getintprop_default(dp, "upa-portid", -1);
|
||||
if (op->portid == -1)
|
||||
op->portid = of_getintprop_default(dp, "portid", -1);
|
||||
|
||||
irq = of_get_property(dp, "interrupts", &len);
|
||||
if (irq)
|
||||
op->irq = *irq;
|
||||
else
|
||||
op->irq = 0xffffffff;
|
||||
|
||||
build_device_resources(op, parent);
|
||||
|
||||
op->dev.parent = parent;
|
||||
op->dev.bus = &of_bus_type;
|
||||
if (!parent)
|
||||
strcpy(op->dev.bus_id, "root");
|
||||
else
|
||||
strcpy(op->dev.bus_id, dp->path_component_name);
|
||||
|
||||
if (of_device_register(op)) {
|
||||
printk("%s: Could not register of device.\n",
|
||||
dp->full_name);
|
||||
kfree(op);
|
||||
op = NULL;
|
||||
}
|
||||
|
||||
return op;
|
||||
}
|
||||
|
||||
static void __init scan_tree(struct device_node *dp, struct device *parent)
|
||||
{
|
||||
while (dp) {
|
||||
struct of_device *op = scan_one_device(dp, parent);
|
||||
|
||||
if (op)
|
||||
scan_tree(dp->child, &op->dev);
|
||||
|
||||
dp = dp->sibling;
|
||||
}
|
||||
}
|
||||
|
||||
static void __init scan_of_devices(void)
|
||||
{
|
||||
struct device_node *root = of_find_node_by_path("/");
|
||||
struct of_device *parent;
|
||||
|
||||
parent = scan_one_device(root, NULL);
|
||||
if (!parent)
|
||||
return;
|
||||
|
||||
scan_tree(root->child, &parent->dev);
|
||||
}
|
||||
|
||||
static int __init of_bus_driver_init(void)
|
||||
{
|
||||
int err = 0;
|
||||
int err;
|
||||
|
||||
err = bus_register(&of_bus_type);
|
||||
#ifdef CONFIG_PCI
|
||||
if (!err)
|
||||
err = bus_register(&isa_bus_type);
|
||||
|
|
@ -177,7 +659,11 @@ static int __init of_bus_driver_init(void)
|
|||
if (!err)
|
||||
err = bus_register(&sbus_bus_type);
|
||||
#endif
|
||||
return 0;
|
||||
|
||||
if (!err)
|
||||
scan_of_devices();
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
postcore_initcall(of_bus_driver_init);
|
||||
|
|
|
|||
|
|
@ -4,10 +4,12 @@
|
|||
|
||||
#include <linux/device.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <asm/openprom.h>
|
||||
#include <asm/prom.h>
|
||||
|
||||
extern struct bus_type ebus_bus_type;
|
||||
extern struct bus_type sbus_bus_type;
|
||||
extern struct bus_type of_bus_type;
|
||||
|
||||
/*
|
||||
* The of_device is a kind of "base class" that is a superset of
|
||||
|
|
@ -16,8 +18,16 @@ extern struct bus_type sbus_bus_type;
|
|||
*/
|
||||
struct of_device
|
||||
{
|
||||
struct device_node *node; /* OF device node */
|
||||
struct device dev; /* Generic device interface */
|
||||
struct device_node *node;
|
||||
struct device dev;
|
||||
struct resource resource[PROMREG_MAX];
|
||||
unsigned int irq;
|
||||
|
||||
void *sysdata;
|
||||
|
||||
int slot;
|
||||
int portid;
|
||||
int clock_freq;
|
||||
};
|
||||
#define to_of_device(d) container_of(d, struct of_device, dev)
|
||||
|
||||
|
|
|
|||
|
|
@ -69,6 +69,8 @@ struct device_node {
|
|||
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
|
||||
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
|
||||
|
||||
#define OF_BAD_ADDR ((u64)-1)
|
||||
|
||||
static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
|
||||
{
|
||||
dn->pde = de;
|
||||
|
|
|
|||
|
|
@ -4,11 +4,13 @@
|
|||
|
||||
#include <linux/device.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <asm/openprom.h>
|
||||
#include <asm/prom.h>
|
||||
|
||||
extern struct bus_type isa_bus_type;
|
||||
extern struct bus_type ebus_bus_type;
|
||||
extern struct bus_type sbus_bus_type;
|
||||
extern struct bus_type of_bus_type;
|
||||
|
||||
/*
|
||||
* The of_device is a kind of "base class" that is a superset of
|
||||
|
|
@ -17,8 +19,16 @@ extern struct bus_type sbus_bus_type;
|
|||
*/
|
||||
struct of_device
|
||||
{
|
||||
struct device_node *node; /* OF device node */
|
||||
struct device dev; /* Generic device interface */
|
||||
struct device_node *node;
|
||||
struct device dev;
|
||||
struct resource resource[PROMREG_MAX];
|
||||
unsigned int irq;
|
||||
|
||||
void *sysdata;
|
||||
|
||||
int slot;
|
||||
int portid;
|
||||
int clock_freq;
|
||||
};
|
||||
#define to_of_device(d) container_of(d, struct of_device, dev)
|
||||
|
||||
|
|
|
|||
|
|
@ -69,6 +69,8 @@ struct device_node {
|
|||
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
|
||||
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
|
||||
|
||||
#define OF_BAD_ADDR ((u64)-1)
|
||||
|
||||
static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
|
||||
{
|
||||
dn->pde = de;
|
||||
|
|
|
|||
Loading…
Reference in New Issue