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x86: I/O APIC: remove an IRQ2-mask hack 

Now that IRQ2 is never made available to the I/O APIC, there is no need
to special-case it and mask as a workaround for broken systems.  Actually,
because of the former, mask_IO_APIC_irq(2) is a no-op already.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Maciej W. Rozycki 2008-07-13 03:29:42 +01:00 committed by Ingo Molnar
parent 3d88cca708
commit ce8b06b985
5 changed files with 0 additions and 32 deletions
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1
arch/x86/kernel/acpi/boot.c
View File

@ -1409,7 +1409,6 @@ static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
{
pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident);
acpi_skip_timer_override = 1;
force_mask_ioapic_irq_2();
return 0;
}

10
arch/x86/kernel/io_apic_32.c
View File

@ -59,13 +59,6 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
static DEFINE_SPINLOCK(ioapic_lock);
static DEFINE_SPINLOCK(vector_lock);
static bool mask_ioapic_irq_2 __initdata;
void __init force_mask_ioapic_irq_2(void)
{
mask_ioapic_irq_2 = true;
}
int timer_through_8259 __initdata;
/*
@ -2187,9 +2180,6 @@ static inline void __init check_timer(void)
printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
vector, apic1, pin1, apic2, pin2);
if (mask_ioapic_irq_2)
mask_IO_APIC_irq(2);
/*
* Some BIOS writers are clueless and report the ExtINTA
* I/O APIC input from the cascaded 8259A as the timer

10
arch/x86/kernel/io_apic_64.c
View File

@ -94,13 +94,6 @@ static int no_timer_check;
static int disable_timer_pin_1 __initdata;
static bool mask_ioapic_irq_2 __initdata;
void __init force_mask_ioapic_irq_2(void)
{
mask_ioapic_irq_2 = true;
}
int timer_through_8259 __initdata;
/* Where if anywhere is the i8259 connect in external int mode */
@ -1706,9 +1699,6 @@ static inline void __init check_timer(void)
apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
cfg->vector, apic1, pin1, apic2, pin2);
if (mask_ioapic_irq_2)
mask_IO_APIC_irq(2);
/*
* Some BIOS writers are clueless and report the ExtINTA
* I/O APIC input from the cascaded 8259A as the timer

5
include/asm-x86/genapic_32.h
View File

@ -119,10 +119,5 @@ enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
#define is_uv_system() 0
#define uv_wakeup_secondary(a, b) 1
#ifdef CONFIG_X86_IO_APIC
extern void force_mask_ioapic_irq_2(void);
#else
static inline void force_mask_ioapic_irq_2(void) { }
#endif
#endif

6
include/asm-x86/genapic_64.h
View File

@ -46,10 +46,4 @@ extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
extern void setup_apic_routing(void);
#ifdef CONFIG_X86_IO_APIC
extern void force_mask_ioapic_irq_2(void);
#else
static inline void force_mask_ioapic_irq_2(void) { }
#endif
#endif