mv643xx_eth: inter-mv643xx SMI port sharing
There exist chips with up to four mv643xx_eth silicon blocks but only one external SMI (MII management) interface -- the SMI logic of the first block is shared by all the blocks. Handle this by allowing a per-port override of which mv643xx_eth_shared's SMI registers (and spinlock) to use. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
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@ -527,6 +527,8 @@ struct mv643xx_private {
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struct mv643xx_shared_private *shared;
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int port_num; /* User Ethernet port number */
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struct mv643xx_shared_private *shared_smi;
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u32 rx_sram_addr; /* Base address of rx sram area */
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u32 rx_sram_size; /* Size of rx sram area */
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u32 tx_sram_addr; /* Base address of tx sram area */
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@ -1898,6 +1900,10 @@ static int mv643xx_eth_probe(struct platform_device *pdev)
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if (mp->shared->win_protect)
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wrl(mp, WINDOW_PROTECT(port_num), mp->shared->win_protect);
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mp->shared_smi = mp->shared;
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if (pd->shared_smi != NULL)
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mp->shared_smi = platform_get_drvdata(pd->shared_smi);
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/* set default config values */
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eth_port_uc_addr_get(mp, dev->dev_addr);
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mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
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@ -2986,15 +2992,16 @@ static void eth_port_reset(struct mv643xx_private *mp)
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static void eth_port_read_smi_reg(struct mv643xx_private *mp,
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unsigned int phy_reg, unsigned int *value)
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{
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void __iomem *smi_reg = mp->shared_smi->eth_base + SMI_REG;
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int phy_addr = ethernet_phy_get(mp);
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unsigned long flags;
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int i;
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/* the SMI register is a shared resource */
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spin_lock_irqsave(&mp->shared->phy_lock, flags);
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spin_lock_irqsave(&mp->shared_smi->phy_lock, flags);
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/* wait for the SMI register to become available */
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for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) {
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for (i = 0; readl(smi_reg) & ETH_SMI_BUSY; i++) {
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if (i == PHY_WAIT_ITERATIONS) {
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printk("%s: PHY busy timeout\n", mp->dev->name);
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goto out;
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@ -3002,11 +3009,11 @@ static void eth_port_read_smi_reg(struct mv643xx_private *mp,
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udelay(PHY_WAIT_MICRO_SECONDS);
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}
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wrl(mp, SMI_REG,
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(phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ);
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writel((phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ,
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smi_reg);
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/* now wait for the data to be valid */
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for (i = 0; !(rdl(mp, SMI_REG) & ETH_SMI_READ_VALID); i++) {
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for (i = 0; !(readl(smi_reg) & ETH_SMI_READ_VALID); i++) {
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if (i == PHY_WAIT_ITERATIONS) {
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printk("%s: PHY read timeout\n", mp->dev->name);
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goto out;
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@ -3014,9 +3021,9 @@ static void eth_port_read_smi_reg(struct mv643xx_private *mp,
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udelay(PHY_WAIT_MICRO_SECONDS);
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}
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*value = rdl(mp, SMI_REG) & 0xffff;
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*value = readl(smi_reg) & 0xffff;
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out:
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spin_unlock_irqrestore(&mp->shared->phy_lock, flags);
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spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags);
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}
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/*
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@ -3042,17 +3049,16 @@ out:
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static void eth_port_write_smi_reg(struct mv643xx_private *mp,
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unsigned int phy_reg, unsigned int value)
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{
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int phy_addr;
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int i;
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void __iomem *smi_reg = mp->shared_smi->eth_base + SMI_REG;
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int phy_addr = ethernet_phy_get(mp);
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unsigned long flags;
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phy_addr = ethernet_phy_get(mp);
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int i;
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/* the SMI register is a shared resource */
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spin_lock_irqsave(&mp->shared->phy_lock, flags);
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spin_lock_irqsave(&mp->shared_smi->phy_lock, flags);
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/* wait for the SMI register to become available */
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for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) {
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for (i = 0; readl(smi_reg) & ETH_SMI_BUSY; i++) {
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if (i == PHY_WAIT_ITERATIONS) {
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printk("%s: PHY busy timeout\n", mp->dev->name);
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goto out;
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@ -3060,10 +3066,10 @@ static void eth_port_write_smi_reg(struct mv643xx_private *mp,
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udelay(PHY_WAIT_MICRO_SECONDS);
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}
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wrl(mp, SMI_REG, (phy_addr << 16) | (phy_reg << 21) |
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ETH_SMI_OPCODE_WRITE | (value & 0xffff));
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writel((phy_addr << 16) | (phy_reg << 21) |
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ETH_SMI_OPCODE_WRITE | (value & 0xffff), smi_reg);
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out:
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spin_unlock_irqrestore(&mp->shared->phy_lock, flags);
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spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags);
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}
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/*
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@ -24,6 +24,8 @@ struct mv643xx_eth_platform_data {
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struct platform_device *shared;
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int port_number;
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struct platform_device *shared_smi;
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u16 force_phy_addr; /* force override if phy_addr == 0 */
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u16 phy_addr;
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