hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Watchdog nodes and a duplicate pinctrl property. 

-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJT2dEIAAoJEPOmecmc0R2B8W0H/irwD4+yXxgaDzVFRrZ/txBZ
 4BHh92O8Gw5CEhV785TA6rtlVpY/AkR+kKzlsCNJxg0e8b0WLSoebMqbWUGHeYyc
 0BLv3BY4U/lLFGKYNqjYOGJS8OEbWrNBdHCn9KnfNrRliusrtWHXX2RhxsdtKeyd
 W4LPNwWzLZeX8jUfW4Qu1vsb6xSF/IpL/xlWf43W5HkVAmEEn6FvS5IvkEghcpL9
 cudKDarhVFheiFz9GwIG9IAMJfaIvoi01UL2GmjC258KN/lKKCF/yNVkSJnsNSLc
 jIX7+LCvd0iQlODosX67SBw6UMk8J4ZxPV5Cx09pJCNzG/wyDrX22l/fexVZKfk=
 =XbY+
 -----END PGP SIGNATURE-----

Merge tag 'v3.17-rockchip-rk3xxx-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "two more dts changes for Rockchip Cortex-A9 SoCs" from Heiko Stübner:

Watchdog nodes and a duplicate pinctrl property.

* tag 'v3.17-rockchip-rk3xxx-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add watchdog node
  ARM: dts: rockchip: remove pinctrl setting from radxarock uart2

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-07-30 22:40:49 -07:00
parent 68a05338ce eb2b9d47dd
commit cdf26ad472
5 changed files with 24 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/rk3066a-bqcurie2.dts
View File

@ -188,3 +188,7 @@
&uart3 {
status = "okay";
};
&wdt {
status = "okay";
};

4
arch/arm/boot/dts/rk3066a.dtsi
View File

@ -425,3 +425,7 @@
pinctrl-names = "default";
pinctrl-0 = <&uart3_xfer>;
};
&wdt {
compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
};

6
arch/arm/boot/dts/rk3188-radxarock.dts
View File

@ -215,11 +215,13 @@
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
status = "okay";
};
&uart3 {
status = "okay";
};
&wdt {
status = "okay";
};

4
arch/arm/boot/dts/rk3188.dtsi
View File

@ -400,3 +400,7 @@
pinctrl-names = "default";
pinctrl-0 = <&uart3_xfer>;
};
&wdt {
compatible = "rockchip,rk3188-wdt", "snps,dw-wdt";
};

8
arch/arm/boot/dts/rk3xxx.dtsi
View File

@ -174,6 +174,14 @@
status = "disabled";
};
wdt: watchdog@2004c000 {
compatible = "snps,dw-wdt";
reg = <0x2004c000 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pwm2: pwm@20050020 {
compatible = "rockchip,rk2928-pwm";
reg = <0x20050020 0x10>;