media: staging: media: Introduce NVIDIA Tegra video decoder driver
NVIDIA Tegra20/30/114/124/132 SoC's have video decoder engine that supports standard set of video formats like H.264 / MPEG-4 / WMV / VC1. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -8680,6 +8680,15 @@ T: git git://linuxtv.org/media_tree.git
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S: Maintained
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F: drivers/media/dvb-frontends/stv6111*
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MEDIA DRIVERS FOR NVIDIA TEGRA - VDE
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M: Dmitry Osipenko <digetx@gmail.com>
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L: linux-media@vger.kernel.org
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L: linux-tegra@vger.kernel.org
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T: git git://linuxtv.org/media_tree.git
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S: Maintained
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F: Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt
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F: drivers/staging/media/tegra-vde/
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MEDIA INPUT INFRASTRUCTURE (V4L/DVB)
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M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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M: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -34,4 +34,6 @@ source "drivers/staging/media/omap4iss/Kconfig"
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# Keep LIRC at the end, as it has sub-menus
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source "drivers/staging/media/lirc/Kconfig"
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source "drivers/staging/media/tegra-vde/Kconfig"
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endif
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@ -6,3 +6,4 @@ obj-$(CONFIG_LIRC_STAGING) += lirc/
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obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/
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obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/
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obj-$(CONFIG_INTEL_ATOMISP) += atomisp/
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obj-$(CONFIG_TEGRA_VDE) += tegra-vde/
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@ -0,0 +1,7 @@
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config TEGRA_VDE
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tristate "NVIDIA Tegra Video Decoder Engine driver"
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depends on ARCH_TEGRA || COMPILE_TEST
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select SRAM
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help
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Say Y here to enable support for the NVIDIA Tegra video decoder
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driver.
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@ -0,0 +1 @@
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obj-$(CONFIG_TEGRA_VDE) += tegra-vde.o
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@ -0,0 +1,4 @@
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TODO:
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- Implement V4L2 API once it gains support for stateless decoders.
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Contact: Dmitry Osipenko <digetx@gmail.com>
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/*
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* Copyright (C) 2016-2017 Dmitry Osipenko <digetx@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _UAPI_TEGRA_VDE_H_
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#define _UAPI_TEGRA_VDE_H_
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#include <linux/types.h>
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#include <asm/ioctl.h>
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#define FLAG_B_FRAME (1 << 0)
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#define FLAG_REFERENCE (1 << 1)
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struct tegra_vde_h264_frame {
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__s32 y_fd;
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__s32 cb_fd;
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__s32 cr_fd;
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__s32 aux_fd;
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__u32 y_offset;
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__u32 cb_offset;
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__u32 cr_offset;
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__u32 aux_offset;
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__u32 frame_num;
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__u32 flags;
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__u32 reserved;
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} __attribute__((packed));
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struct tegra_vde_h264_decoder_ctx {
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__s32 bitstream_data_fd;
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__u32 bitstream_data_offset;
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__u64 dpb_frames_ptr;
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__u8 dpb_frames_nb;
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__u8 dpb_ref_frames_with_earlier_poc_nb;
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// SPS
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__u8 baseline_profile;
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__u8 level_idc;
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__u8 log2_max_pic_order_cnt_lsb;
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__u8 log2_max_frame_num;
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__u8 pic_order_cnt_type;
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__u8 direct_8x8_inference_flag;
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__u8 pic_width_in_mbs;
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__u8 pic_height_in_mbs;
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// PPS
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__u8 pic_init_qp;
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__u8 deblocking_filter_control_present_flag;
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__u8 constrained_intra_pred_flag;
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__u8 chroma_qp_index_offset;
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__u8 pic_order_present_flag;
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// Slice header
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__u8 num_ref_idx_l0_active_minus1;
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__u8 num_ref_idx_l1_active_minus1;
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__u32 reserved;
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} __attribute__((packed));
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#define VDE_IOCTL_BASE ('v' + 0x20)
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#define VDE_IO(nr) _IO(VDE_IOCTL_BASE, nr)
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#define VDE_IOR(nr, type) _IOR(VDE_IOCTL_BASE, nr, type)
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#define VDE_IOW(nr, type) _IOW(VDE_IOCTL_BASE, nr, type)
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#define VDE_IOWR(nr, type) _IOWR(VDE_IOCTL_BASE, nr, type)
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#define TEGRA_VDE_DECODE_H264 0x00
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#define TEGRA_VDE_IOCTL_DECODE_H264 \
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VDE_IOW(TEGRA_VDE_DECODE_H264, struct tegra_vde_h264_decoder_ctx)
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#endif // _UAPI_TEGRA_VDE_H_
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