arm: perf: treat PMUs as CPU affine
In multi-cluster systems, the PMUs can be different across clusters, and so our logical PMU may not be able to schedule events on all CPUs. This patch adds a cpumask to encode which CPUs a PMU driver supports controlling events for, and limits the driver to scheduling events on those CPUs, and enabling and disabling the physical PMUs on those CPUs. The cpumask is built based on the interrupt-affinity property, and in the absence of such a property a homogenous system is assumed. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -92,6 +92,7 @@ struct pmu_hw_events {
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struct arm_pmu {
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struct pmu pmu;
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cpumask_t active_irqs;
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cpumask_t supported_cpus;
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int *irq_affinity;
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char *name;
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irqreturn_t (*handle_irq)(int irq_num, void *dev);
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@ -11,6 +11,7 @@
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*/
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#define pr_fmt(fmt) "hw perfevents: " fmt
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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@ -229,6 +230,10 @@ armpmu_add(struct perf_event *event, int flags)
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int idx;
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int err = 0;
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/* An event following a process won't be stopped earlier */
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if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
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return -ENOENT;
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perf_pmu_disable(event->pmu);
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/* If we don't have a space for the counter then finish early. */
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@ -454,6 +459,17 @@ static int armpmu_event_init(struct perf_event *event)
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int err = 0;
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atomic_t *active_events = &armpmu->active_events;
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/*
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* Reject CPU-affine events for CPUs that are of a different class to
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* that which this PMU handles. Process-following events (where
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* event->cpu == -1) can be migrated between CPUs, and thus we have to
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* reject them later (in armpmu_add) if they're scheduled on a
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* different class of CPU.
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*/
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if (event->cpu != -1 &&
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!cpumask_test_cpu(event->cpu, &armpmu->supported_cpus))
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return -ENOENT;
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/* does not support taken branch sampling */
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if (has_branch_stack(event))
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return -EOPNOTSUPP;
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@ -489,6 +505,10 @@ static void armpmu_enable(struct pmu *pmu)
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struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
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int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);
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/* For task-bound events we may be called on other CPUs */
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if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
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return;
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if (enabled)
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armpmu->start(armpmu);
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}
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@ -496,6 +516,11 @@ static void armpmu_enable(struct pmu *pmu)
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static void armpmu_disable(struct pmu *pmu)
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{
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struct arm_pmu *armpmu = to_arm_pmu(pmu);
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/* For task-bound events we may be called on other CPUs */
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if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
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return;
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armpmu->stop(armpmu);
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}
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@ -179,11 +179,15 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
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void *hcpu)
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{
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int cpu = (unsigned long)hcpu;
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struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);
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if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
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return NOTIFY_DONE;
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if (!cpumask_test_cpu(cpu, &pmu->supported_cpus))
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return NOTIFY_DONE;
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if (pmu->reset)
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pmu->reset(pmu);
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else
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@ -219,7 +223,8 @@ static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
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/* Ensure the PMU has sane values out of reset. */
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if (cpu_pmu->reset)
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on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
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on_each_cpu_mask(&cpu_pmu->supported_cpus, cpu_pmu->reset,
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cpu_pmu, 1);
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/* If no interrupts available, set the corresponding capability flag */
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if (!platform_get_irq(cpu_pmu->plat_device, 0))
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@ -334,12 +339,15 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu)
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}
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irqs[i] = cpu;
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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}
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if (i == pdev->num_resources)
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if (i == pdev->num_resources) {
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pmu->irq_affinity = irqs;
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else
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} else {
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kfree(irqs);
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cpumask_setall(&pmu->supported_cpus);
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}
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return 0;
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}
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@ -374,6 +382,7 @@ static int cpu_pmu_device_probe(struct platform_device *pdev)
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ret = init_fn(pmu);
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} else {
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ret = probe_current_pmu(pmu);
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cpumask_setall(&pmu->supported_cpus);
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}
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if (ret) {
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