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ARM: pm: omap3: move saving of the auxiliary control registers to C 

Move the saving of the auxiliary control registers into C; there's
no need for this to be in assembly code.  This results in less
assembly code to deal with in OMAP.

Kevin tested full-chip retention and off on 3430/n900, 3530/Overo and
3630/Zoom3.

Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2011-06-30 08:45:49 +01:00
parent 46e130d298
commit cbe263497d
3 changed files with 21 additions and 12 deletions
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2
arch/arm/mach-omap2/pm.h
View File

@ -97,7 +97,7 @@ extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
extern unsigned int omap24xx_cpu_suspend_sz;
/* 3xxx */
extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
extern void omap34xx_cpu_suspend(int save_state);
/* omap3_do_wfi function pointer and size, for copy to SRAM */
extern void omap3_do_wfi(void);

19
arch/arm/mach-omap2/pm34xx.c
View File

@ -306,9 +306,24 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
return IRQ_HANDLED;
}
static void omap34xx_save_context(u32 *save)
{
u32 val;
/* Read Auxiliary Control Register */
asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (val));
*save++ = 1;
*save++ = val;
/* Read L2 AUX ctrl register */
asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
*save++ = 1;
*save++ = val;
}
static void omap34xx_do_sram_idle(unsigned long save_state)
{
omap34xx_cpu_suspend(omap3_arm_context, save_state);
omap34xx_cpu_suspend(save_state);
}
void omap_sram_idle(void)
@ -408,6 +423,8 @@ void omap_sram_idle(void)
* get saved. The rest is placed on the stack, and restored
* from there before resuming.
*/
if (save_state)
omap34xx_save_context(omap3_arm_context);
if (save_state == 1 || save_state == 3)
cpu_suspend(save_state, omap34xx_do_sram_idle);
else

12
arch/arm/mach-omap2/sleep34xx.S
View File

@ -152,8 +152,7 @@ ENTRY(omap34xx_cpu_suspend)
stmfd sp!, {r4 - r11, lr} @ save registers on stack
/*
* r0 contains CPU context save/restore pointer in sdram
* r1 contains information about saving context:
* r0 contains information about saving context:
* 0 - No context lost
* 1 - Only L1 and logic lost
* 2 - Only L2 lost (Even L1 is retained we clean it along with L2)
@ -166,19 +165,12 @@ ENTRY(omap34xx_cpu_suspend)
*/
ldr r4, omap3_do_wfi_sram_addr
ldr r5, [r4]
cmp r1, #0x0 @ If no context save required,
cmp r0, #0x0 @ If no context save required,
bxeq r5 @ jump to the WFI code in SRAM
/* Otherwise fall through to the save context code */
save_context_wfi:
mov r8, r0 @ Store SDRAM address in r8
mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
mov r4, #0x1 @ Number of parameters for restore call
stmia r8!, {r4-r5} @ Push parameters for restore call
mrc p15, 1, r5, c9, c0, 2 @ Read L2 AUX ctrl register
stmia r8!, {r4-r5} @ Push parameters for restore call
/*
* jump out to kernel flush routine
* - reuse that code is better