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ARM: dts: imx51-babbage: Fix the 26MHz clock modelling 

On imx51-babbage there is a 26MHz oscillator that is gated by GPIO3_1.

The output of this clock feeds audio codec clock and USB PHY clocks,
which are gated by GPIO4_26 and GPIO2_1 respectively.

Fix the clock representation by properly using gpio-gate-clock.

The clock nodes can be moved out of the 'clocks' node.

Based on a commit from Lucas Stach for imx51-zii-rdu1 board.

This also fixes the following build warning with W=1:

arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit name

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam 2017-12-21 13:23:52 -02:00 committed by Shawn Guo
parent 7bb83f6d08
commit cb790819ad
1 changed files with 50 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

67
arch/arm/boot/dts/imx51-babbage.dts
View File

@ -25,18 +25,41 @@
reg = <0x90000000 0x20000000>; reg = <0x90000000 0x20000000>;
}; };
clocks { ckih1 {
ckih1 { clock-frequency = <22579200>;
clock-frequency = <22579200>; };
};
clk_26M: codec_clock { clk_osc: clk-osc {
compatible = "fixed-clock"; compatible = "fixed-clock";
reg=<0>; #clock-cells = <0>;
#clock-cells = <0>; clock-frequency = <26000000>;
clock-frequency = <26000000>; };
gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
}; clk_osc_gate: clk-osc-gate {
compatible = "gpio-gate-clock";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clk26mhz_osc>;
clocks = <&clk_osc>;
#clock-cells = <0>;
enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
};
clk_audio: clk-audio {
compatible = "gpio-gate-clock";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clk26mhz_audio>;
clocks = <&clk_osc_gate>;
#clock-cells = <0>;
enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
};
clk_usb: clk-usb {
compatible = "gpio-gate-clock";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clk26mhz_usb>;
clocks = <&clk_osc_gate>;
#clock-cells = <0>;
enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
}; };
display1: disp1 { display1: disp1 {
@ -162,7 +185,7 @@
usbh1phy: usbh1phy@0 { usbh1phy: usbh1phy@0 {
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
reg = <0>; reg = <0>;
clocks = <&clks IMX5_CLK_DUMMY>; clocks = <&clk_usb>;
clock-names = "main_clk"; clock-names = "main_clk";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
vcc-supply = <&vusb_reg>; vcc-supply = <&vusb_reg>;
@ -345,10 +368,8 @@
sgtl5000: codec@a { sgtl5000: codec@a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clkcodec>;
reg = <0x0a>; reg = <0x0a>;
clocks = <&clk_26M>; clocks = <&clk_audio>;
VDDA-supply = <&vdig_reg>; VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>; VDDIO-supply = <&vvideo_reg>;
}; };
@ -441,9 +462,21 @@
>; >;
}; };
pinctrl_clkcodec: clkcodecgrp { pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
fsl,pins = < fsl,pins = <
MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
>;
};
pinctrl_clk26mhz_osc: clk26mhzoscgrp {
fsl,pins = <
MX51_PAD_DI1_PIN12__GPIO3_1 0x85
>;
};
pinctrl_clk26mhz_usb: clk26mhzusbgrp {
fsl,pins = <
MX51_PAD_EIM_D17__GPIO2_1 0x85
>; >;
}; };