ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
On imx51-babbage there is a 26MHz oscillator that is gated by GPIO3_1. The output of this clock feeds audio codec clock and USB PHY clocks, which are gated by GPIO4_26 and GPIO2_1 respectively. Fix the clock representation by properly using gpio-gate-clock. The clock nodes can be moved out of the 'clocks' node. Based on a commit from Lucas Stach for imx51-zii-rdu1 board. This also fixes the following build warning with W=1: arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -25,18 +25,41 @@
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reg = <0x90000000 0x20000000>;
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};
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clocks {
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ckih1 {
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clock-frequency = <22579200>;
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};
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ckih1 {
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clock-frequency = <22579200>;
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};
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clk_26M: codec_clock {
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compatible = "fixed-clock";
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reg=<0>;
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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};
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clk_osc: clk-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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clk_osc_gate: clk-osc-gate {
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compatible = "gpio-gate-clock";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_clk26mhz_osc>;
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clocks = <&clk_osc>;
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#clock-cells = <0>;
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enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
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};
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clk_audio: clk-audio {
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compatible = "gpio-gate-clock";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_clk26mhz_audio>;
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clocks = <&clk_osc_gate>;
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#clock-cells = <0>;
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enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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};
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clk_usb: clk-usb {
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compatible = "gpio-gate-clock";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_clk26mhz_usb>;
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clocks = <&clk_osc_gate>;
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#clock-cells = <0>;
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enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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display1: disp1 {
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@ -162,7 +185,7 @@
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usbh1phy: usbh1phy@0 {
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compatible = "usb-nop-xceiv";
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reg = <0>;
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clocks = <&clks IMX5_CLK_DUMMY>;
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clocks = <&clk_usb>;
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clock-names = "main_clk";
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reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
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vcc-supply = <&vusb_reg>;
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@ -345,10 +368,8 @@
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sgtl5000: codec@a {
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compatible = "fsl,sgtl5000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_clkcodec>;
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reg = <0x0a>;
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clocks = <&clk_26M>;
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clocks = <&clk_audio>;
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VDDA-supply = <&vdig_reg>;
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VDDIO-supply = <&vvideo_reg>;
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};
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@ -441,9 +462,21 @@
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>;
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};
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pinctrl_clkcodec: clkcodecgrp {
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pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
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fsl,pins = <
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MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
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MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
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>;
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};
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pinctrl_clk26mhz_osc: clk26mhzoscgrp {
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fsl,pins = <
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MX51_PAD_DI1_PIN12__GPIO3_1 0x85
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>;
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};
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pinctrl_clk26mhz_usb: clk26mhzusbgrp {
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fsl,pins = <
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MX51_PAD_EIM_D17__GPIO2_1 0x85
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>;
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};
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