drm/i915: Set correct TV detection voltage level override values
We detect TV connect status by setting DAC voltage level override values as 0.7 voltage for DAC_A/B/C. The corresponding 2-bits shold be 0x2, In order correctly to set last bit as 0, at first we must clean it. It fixed freedesktop.org bug #21204 Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -958,15 +958,15 @@
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# define DAC_A_1_3_V (0 << 4)
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# define DAC_A_1_1_V (1 << 4)
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# define DAC_A_0_7_V (2 << 4)
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# define DAC_A_OFF (3 << 4)
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# define DAC_A_MASK (3 << 4)
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# define DAC_B_1_3_V (0 << 2)
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# define DAC_B_1_1_V (1 << 2)
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# define DAC_B_0_7_V (2 << 2)
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# define DAC_B_OFF (3 << 2)
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# define DAC_B_MASK (3 << 2)
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# define DAC_C_1_3_V (0 << 0)
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# define DAC_C_1_1_V (1 << 0)
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# define DAC_C_0_7_V (2 << 0)
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# define DAC_C_OFF (3 << 0)
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# define DAC_C_MASK (3 << 0)
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/**
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* CSC coefficients are stored in a floating point format with 9 bits of
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@ -1392,6 +1392,9 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output)
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tv_ctl &= ~TV_TEST_MODE_MASK;
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tv_ctl |= TV_TEST_MODE_MONITOR_DETECT;
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tv_dac &= ~TVDAC_SENSE_MASK;
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tv_dac &= ~DAC_A_MASK;
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tv_dac &= ~DAC_B_MASK;
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tv_dac &= ~DAC_C_MASK;
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tv_dac |= (TVDAC_STATE_CHG_EN |
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TVDAC_A_SENSE_CTL |
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TVDAC_B_SENSE_CTL |
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