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ARM: 7927/1: dcache: select DCACHE_WORD_ACCESS for big-endian CPUs 

With commit 11ec50caed ("word-at-a-time: provide generic big-endian
zero_bytemask implementation"), the asm-generic word-at-a-time code now
provides a zero_bytemask implementation, allowing us to make use of
DCACHE_WORD_ACCESS on big-endian CPUs, providing our
load_unaligned_zeropad function is endianness-clean.

This patch reworks the load_unaligned_zeropad fixup code to work for
both big- and little-endian CPUs, then removes the !CPU_BIG_ENDIAN check
when selecting DCACHE_WORD_ACCESS.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Will Deacon 2013-12-17 19:50:11 +01:00 committed by Russell King
parent 5d49750933
commit cb601185da
2 changed files with 11 additions and 9 deletions
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2
arch/arm/Kconfig
View File

@ -12,7 +12,7 @@ config ARM
select BUILDTIME_EXTABLE_SORT if MMU select BUILDTIME_EXTABLE_SORT if MMU
select CLONE_BACKWARDS select CLONE_BACKWARDS
select CPU_PM if (SUSPEND || CPU_IDLE) select CPU_PM if (SUSPEND || CPU_IDLE)
select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI) select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
select GENERIC_CLOCKEVENTS_BROADCAST if SMP select GENERIC_CLOCKEVENTS_BROADCAST if SMP
select GENERIC_IDLE_POLL_SETUP select GENERIC_IDLE_POLL_SETUP

18
arch/arm/include/asm/word-at-a-time.h
View File

@ -48,10 +48,14 @@ static inline unsigned long find_zero(unsigned long mask)
return ret; return ret;
} }
#ifdef CONFIG_DCACHE_WORD_ACCESS
#define zero_bytemask(mask) (mask) #define zero_bytemask(mask) (mask)
#else /* __ARMEB__ */
#include <asm-generic/word-at-a-time.h>
#endif
#ifdef CONFIG_DCACHE_WORD_ACCESS
/* /*
* Load an unaligned word from kernel space. * Load an unaligned word from kernel space.
* *
@ -73,7 +77,11 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
" bic %2, %2, #0x3\n" " bic %2, %2, #0x3\n"
" ldr %0, [%2]\n" " ldr %0, [%2]\n"
" lsl %1, %1, #0x3\n" " lsl %1, %1, #0x3\n"
#ifndef __ARMEB__
" lsr %0, %0, %1\n" " lsr %0, %0, %1\n"
#else
" lsl %0, %0, %1\n"
#endif
" b 2b\n" " b 2b\n"
" .popsection\n" " .popsection\n"
" .pushsection __ex_table,\"a\"\n" " .pushsection __ex_table,\"a\"\n"
@ -86,11 +94,5 @@ static inline unsigned long load_unaligned_zeropad(const void *addr)
return ret; return ret;
} }
#endif /* DCACHE_WORD_ACCESS */ #endif /* DCACHE_WORD_ACCESS */
#else /* __ARMEB__ */
#include <asm-generic/word-at-a-time.h>
#endif
#endif /* __ASM_ARM_WORD_AT_A_TIME_H */ #endif /* __ASM_ARM_WORD_AT_A_TIME_H */