MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage
There are mixed LOONGSON3/LOONGSON64 usages in recently changes, let's establish some rules: 1, In Kconfig symbols, we only use CPU_LOONGSON64, MACH_LOONGSON64 and SYS_HAS_CPU_LOONGSON64, all other derived symbols use "LOONGSON3" since they all not widely-used symbols and sometimes not suitable for all 64-bit Loongson processors. E.g., we use symbols LOONGSON3_ENHANCEMENT, CPU_LOONGSON3_WORKAROUNDS, etc. 2, Hide GSx64/GSx64E in Kconfig title since it is not useful for general users. However, in the full description we use a more detailed manner. E.g., GS264/GS464/GS464E/GS464V. All Kconfig titles and descriptions of Loongson processors and machines have also been updated in this patch for consistency. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-mips@vger.kernel.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Huacai Chen <chenhuacai@gmail.com>
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@ -444,7 +444,7 @@ config LASAT
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MACH_LOONGSON32
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bool "Loongson-1 family of machines"
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bool "Loongson 32-bit family of machines"
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select SYS_SUPPORTS_ZBOOT
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help
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This enables support for the Loongson-1 family of machines.
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@ -460,7 +460,7 @@ config MACH_LOONGSON2EF
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This enables the support of early Loongson-2E/F family of machines.
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config MACH_LOONGSON64
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bool "Loongson-2/3 GSx64 family of machines"
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bool "Loongson 64-bit family of machines"
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_MIGHT_HAVE_PC_SERIO
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@ -489,8 +489,12 @@ config MACH_LOONGSON64
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select ZONE_DMA32
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select NUMA
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help
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This enables the support of Loongson-2/3 family of processors with
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GSx64 microarchitecture.
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This enables the support of Loongson-2/3 family of machines.
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Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
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GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
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and Loongson-2F which will be removed), developed by the Institute
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of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
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config MACH_PISTACHIO
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bool "IMG Pistachio SoC based boards"
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@ -1432,7 +1436,7 @@ choice
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default CPU_R4X00
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config CPU_LOONGSON64
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bool "Loongson GSx64 CPU"
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bool "Loongson 64-bit CPU"
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depends on SYS_HAS_CPU_LOONGSON64
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select ARCH_HAS_PHYS_TO_DMA
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select CPU_SUPPORTS_64BIT_KERNEL
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@ -1448,17 +1452,20 @@ config CPU_LOONGSON64
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select GPIOLIB
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select SWIOTLB
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help
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The Loongson GSx64 series of processor cores implements the
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MIPS64R2 instruction set with many extensions.
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The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
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cores implements the MIPS64R2 instruction set with many extensions,
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including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
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3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
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Loongson-2E/2F is not covered here and will be removed in future.
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config LOONGSON64_ENHANCEMENT
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bool "New Loongson GSx64E CPU Enhancements"
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config LOONGSON3_ENHANCEMENT
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bool "New Loongson-3 CPU Enhancements"
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default n
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select CPU_MIPSR2
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select CPU_HAS_PREFETCH
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depends on CPU_LOONGSON64
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help
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New Loongson GSx64E cores (since Loongson-3A R2, as opposed to Loongson-3A
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New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
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R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
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FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
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Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
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@ -1467,17 +1474,17 @@ config LOONGSON64_ENHANCEMENT
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This option enable those enhancements which are not probed at run
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time. If you want a generic kernel to run on all Loongson 3 machines,
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please say 'N' here. If you want a high-performance kernel to run on
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new Loongson 3 machines only, please say 'Y' here.
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new Loongson-3 machines only, please say 'Y' here.
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config CPU_LOONGSON3_WORKAROUNDS
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bool "Old Loongson 3 LLSC Workarounds"
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bool "Old Loongson-3 LLSC Workarounds"
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default y if SMP
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depends on CPU_LOONGSON64
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help
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Loongson 3 processors have the llsc issues which require workarounds.
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Loongson-3 processors have the llsc issues which require workarounds.
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Without workarounds the system may hang unexpectedly.
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Newer Loongson 3 will fix these issues and no workarounds are needed.
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Newer Loongson-3 will fix these issues and no workarounds are needed.
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The workarounds have no significant side effect on them but may
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decrease the performance of the system so this option should be
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disabled unless the kernel is intended to be run on old systems.
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@ -23,7 +23,7 @@
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* TLB hazards
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*/
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#if (defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)) && \
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!defined(CONFIG_CPU_CAVIUM_OCTEON) && !defined(CONFIG_LOONGSON64_ENHANCEMENT)
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!defined(CONFIG_CPU_CAVIUM_OCTEON) && !defined(CONFIG_LOONGSON3_ENHANCEMENT)
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/*
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* MIPSR2 defines ehb for hazard avoidance
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@ -158,7 +158,7 @@ do { \
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} while (0)
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#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
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defined(CONFIG_CPU_LOONGSON2EF) || defined(CONFIG_LOONGSON64_ENHANCEMENT) || \
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defined(CONFIG_CPU_LOONGSON2EF) || defined(CONFIG_LOONGSON3_ENHANCEMENT) || \
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defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR)
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/*
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@ -3,7 +3,7 @@ if MACH_LOONGSON64
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config RS780_HPET
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bool "RS780/SBX00 HPET Timer"
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depends on CONFIG_MACH_LOONGSON64
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depends on MACH_LOONGSON64
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select MIPS_EXTERNAL_TIMER
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help
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This option enables the hpet timer of AMD RS780/SBX00.
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