MIPS: KVM: Trivial whitespace and style fixes
A bunch of misc whitespace and style fixes within arch/mips/kvm/. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Gleb Natapov <gleb@kernel.org> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11883/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -2027,7 +2027,8 @@ config KVM_GUEST
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bool "KVM Guest Kernel"
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depends on BROKEN_ON_SMP
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help
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Select this option if building a guest kernel for KVM (Trap & Emulate) mode
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Select this option if building a guest kernel for KVM (Trap & Emulate)
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mode.
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config KVM_GUEST_TIMER_FREQ
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int "Count/Compare Timer Frequency (MHz)"
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@ -58,7 +58,7 @@
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#define KVM_MAX_VCPUS 1
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#define KVM_USER_MEM_SLOTS 8
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/* memory slots that does not exposed to userspace */
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#define KVM_PRIVATE_MEM_SLOTS 0
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#define KVM_PRIVATE_MEM_SLOTS 0
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
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#define KVM_HALT_POLL_NS_DEFAULT 500000
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@ -1243,10 +1243,9 @@ enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
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#ifdef KVM_MIPS_DEBUG_COP0_COUNTERS
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cop0->stat[MIPS_CP0_STATUS][0]++;
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#endif
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if (rt != 0) {
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if (rt != 0)
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vcpu->arch.gprs[rt] =
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kvm_read_c0_guest_status(cop0);
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}
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/* EI */
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if (inst & 0x20) {
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kvm_debug("[%#lx] mfmcz_op: EI\n",
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@ -2583,9 +2582,8 @@ enum emulation_result kvm_mips_handle_tlbmiss(unsigned long cause,
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* an entry into the guest TLB.
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*/
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index = kvm_mips_guest_tlb_lookup(vcpu,
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(va & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi
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(vcpu->arch.cop0) & ASID_MASK));
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(va & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(vcpu->arch.cop0) & ASID_MASK));
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if (index < 0) {
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if (exccode == T_TLB_LD_MISS) {
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er = kvm_mips_emulate_tlbmiss_ld(cause, opc, run, vcpu);
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@ -335,7 +335,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
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/* Now restore the host state just enough to run the handlers */
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/* Swtich EBASE to the one used by Linux */
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/* Switch EBASE to the one used by Linux */
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/* load up the host EBASE */
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mfc0 v0, CP0_STATUS
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@ -490,11 +490,11 @@ __kvm_mips_return_to_guest:
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REG_ADDU t3, t1, t2
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LONG_L k0, (t3)
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andi k0, k0, 0xff
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mtc0 k0,CP0_ENTRYHI
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mtc0 k0, CP0_ENTRYHI
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ehb
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/* Disable RDHWR access */
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mtc0 zero, CP0_HWRENA
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mtc0 zero, CP0_HWRENA
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/* load the guest context from VCPU and return */
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LONG_L $0, VCPU_R0(k1)
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@ -606,11 +606,11 @@ __kvm_mips_return_to_host:
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/* Restore RDHWR access */
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PTR_LI k0, 0x2000000F
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mtc0 k0, CP0_HWRENA
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mtc0 k0, CP0_HWRENA
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/* Restore RA, which is the address we will return to */
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LONG_L ra, PT_R31(k1)
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j ra
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LONG_L ra, PT_R31(k1)
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j ra
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nop
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VECTOR_END(MIPSX(GuestExceptionEnd))
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@ -673,8 +673,8 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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local_irq_save(flags);
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if (((vcpu->arch.
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guest_kernel_asid[cpu] ^ asid_cache(cpu)) & ASID_VERSION_MASK)) {
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if ((vcpu->arch.guest_kernel_asid[cpu] ^ asid_cache(cpu)) &
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ASID_VERSION_MASK) {
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kvm_get_new_mmu_context(&vcpu->arch.guest_kernel_mm, cpu, vcpu);
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vcpu->arch.guest_kernel_asid[cpu] =
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vcpu->arch.guest_kernel_mm.context.asid[cpu];
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