PCI: spear: Remove unused constants
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -57,87 +57,17 @@ struct pcie_app_reg {
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};
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/* CR0 ID */
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#define RX_LANE_FLIP_EN_ID 0
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#define TX_LANE_FLIP_EN_ID 1
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#define SYS_AUX_PWR_DET_ID 2
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#define APP_LTSSM_ENABLE_ID 3
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#define SYS_ATTEN_BUTTON_PRESSED_ID 4
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#define SYS_MRL_SENSOR_STATE_ID 5
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#define SYS_PWR_FAULT_DET_ID 6
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#define SYS_MRL_SENSOR_CHGED_ID 7
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#define SYS_PRE_DET_CHGED_ID 8
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#define SYS_CMD_CPLED_INT_ID 9
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#define APP_INIT_RST_0_ID 11
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#define APP_REQ_ENTR_L1_ID 12
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#define APP_READY_ENTR_L23_ID 13
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#define APP_REQ_EXIT_L1_ID 14
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#define DEVICE_TYPE_EP (0 << 25)
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#define DEVICE_TYPE_LEP (1 << 25)
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#define DEVICE_TYPE_RC (4 << 25)
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#define SYS_INT_ID 29
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#define MISCTRL_EN_ID 30
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#define REG_TRANSLATION_ENABLE 31
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/* CR1 ID */
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#define APPS_PM_XMT_TURNOFF_ID 2
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#define APPS_PM_XMT_PME_ID 5
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/* CR3 ID */
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#define XMLH_LTSSM_STATE_DETECT_QUIET 0x00
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#define XMLH_LTSSM_STATE_DETECT_ACT 0x01
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#define XMLH_LTSSM_STATE_POLL_ACTIVE 0x02
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#define XMLH_LTSSM_STATE_POLL_COMPLIANCE 0x03
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#define XMLH_LTSSM_STATE_POLL_CONFIG 0x04
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#define XMLH_LTSSM_STATE_PRE_DETECT_QUIET 0x05
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#define XMLH_LTSSM_STATE_DETECT_WAIT 0x06
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#define XMLH_LTSSM_STATE_CFG_LINKWD_START 0x07
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#define XMLH_LTSSM_STATE_CFG_LINKWD_ACEPT 0x08
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#define XMLH_LTSSM_STATE_CFG_LANENUM_WAIT 0x09
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#define XMLH_LTSSM_STATE_CFG_LANENUM_ACEPT 0x0A
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#define XMLH_LTSSM_STATE_CFG_COMPLETE 0x0B
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#define XMLH_LTSSM_STATE_CFG_IDLE 0x0C
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#define XMLH_LTSSM_STATE_RCVRY_LOCK 0x0D
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#define XMLH_LTSSM_STATE_RCVRY_SPEED 0x0E
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#define XMLH_LTSSM_STATE_RCVRY_RCVRCFG 0x0F
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#define XMLH_LTSSM_STATE_RCVRY_IDLE 0x10
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#define XMLH_LTSSM_STATE_L0 0x11
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#define XMLH_LTSSM_STATE_L0S 0x12
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#define XMLH_LTSSM_STATE_L123_SEND_EIDLE 0x13
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#define XMLH_LTSSM_STATE_L1_IDLE 0x14
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#define XMLH_LTSSM_STATE_L2_IDLE 0x15
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#define XMLH_LTSSM_STATE_L2_WAKE 0x16
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#define XMLH_LTSSM_STATE_DISABLED_ENTRY 0x17
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#define XMLH_LTSSM_STATE_DISABLED_IDLE 0x18
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#define XMLH_LTSSM_STATE_DISABLED 0x19
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#define XMLH_LTSSM_STATE_LPBK_ENTRY 0x1A
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#define XMLH_LTSSM_STATE_LPBK_ACTIVE 0x1B
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#define XMLH_LTSSM_STATE_LPBK_EXIT 0x1C
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#define XMLH_LTSSM_STATE_LPBK_EXIT_TIMEOUT 0x1D
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#define XMLH_LTSSM_STATE_HOT_RESET_ENTRY 0x1E
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#define XMLH_LTSSM_STATE_HOT_RESET 0x1F
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#define XMLH_LTSSM_STATE_MASK 0x3F
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#define XMLH_LINK_UP (1 << 6)
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/* CR4 ID */
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#define CFG_MSI_EN_ID 18
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/* CR6 */
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#define INTA_CTRL_INT (1 << 7)
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#define INTB_CTRL_INT (1 << 8)
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#define INTC_CTRL_INT (1 << 9)
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#define INTD_CTRL_INT (1 << 10)
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#define MSI_CTRL_INT (1 << 26)
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/* CR19 ID */
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#define VEN_MSI_REQ_ID 11
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#define VEN_MSI_FUN_NUM_ID 8
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#define VEN_MSI_TC_ID 5
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#define VEN_MSI_VECTOR_ID 0
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#define VEN_MSI_REQ_EN ((u32)0x1 << VEN_MSI_REQ_ID)
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#define VEN_MSI_FUN_NUM_MASK ((u32)0x7 << VEN_MSI_FUN_NUM_ID)
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#define VEN_MSI_TC_MASK ((u32)0x7 << VEN_MSI_TC_ID)
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#define VEN_MSI_VECTOR_MASK ((u32)0x1F << VEN_MSI_VECTOR_ID)
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#define EXP_CAP_ID_OFFSET 0x70
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#define to_spear13xx_pcie(x) container_of(x, struct spear13xx_pcie, pp)
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