Merge branch 'for-next' of git://git.linaro.org/people/triad/linux-pinctrl
* 'for-next' of git://git.linaro.org/people/triad/linux-pinctrl: pinctrl/sirf: fix sirfsoc_get_group_pins prototype pinctrl: Don't copy function name when requesting a pin pinctrl: Don't copy pin names when registering them pinctrl: Remove unsafe __refdata pinctrl: get_group_pins() const fixes pinctrl: add a driver for the CSR SiRFprimaII pinmux pinctrl: add a driver for the U300 pinmux drivers: create a pin control subsystem
This commit is contained in:
Linus Torvalds
commit
c9d6329c35
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@ -0,0 +1,950 @@
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PINCTRL (PIN CONTROL) subsystem
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This document outlines the pin control subsystem in Linux
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This subsystem deals with:
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- Enumerating and naming controllable pins
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- Multiplexing of pins, pads, fingers (etc) see below for details
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The intention is to also deal with:
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- Software-controlled biasing and driving mode specific pins, such as
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pull-up/down, open drain etc, load capacitance configuration when controlled
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by software, etc.
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Top-level interface
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===================
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Definition of PIN CONTROLLER:
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- A pin controller is a piece of hardware, usually a set of registers, that
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can control PINs. It may be able to multiplex, bias, set load capacitance,
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set drive strength etc for individual pins or groups of pins.
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Definition of PIN:
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- PINS are equal to pads, fingers, balls or whatever packaging input or
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output line you want to control and these are denoted by unsigned integers
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in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so
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there may be several such number spaces in a system. This pin space may
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be sparse - i.e. there may be gaps in the space with numbers where no
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pin exists.
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When a PIN CONTROLLER is instatiated, it will register a descriptor to the
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pin control framework, and this descriptor contains an array of pin descriptors
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describing the pins handled by this specific pin controller.
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Here is an example of a PGA (Pin Grid Array) chip seen from underneath:
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A B C D E F G H
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8 o o o o o o o o
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7 o o o o o o o o
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6 o o o o o o o o
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5 o o o o o o o o
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4 o o o o o o o o
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3 o o o o o o o o
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2 o o o o o o o o
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1 o o o o o o o o
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To register a pin controller and name all the pins on this package we can do
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this in our driver:
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#include <linux/pinctrl/pinctrl.h>
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const struct pinctrl_pin_desc __refdata foo_pins[] = {
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PINCTRL_PIN(0, "A1"),
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PINCTRL_PIN(1, "A2"),
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PINCTRL_PIN(2, "A3"),
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...
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PINCTRL_PIN(61, "H6"),
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PINCTRL_PIN(62, "H7"),
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PINCTRL_PIN(63, "H8"),
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};
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static struct pinctrl_desc foo_desc = {
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.name = "foo",
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.pins = foo_pins,
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.npins = ARRAY_SIZE(foo_pins),
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.maxpin = 63,
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.owner = THIS_MODULE,
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};
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int __init foo_probe(void)
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{
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struct pinctrl_dev *pctl;
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pctl = pinctrl_register(&foo_desc, <PARENT>, NULL);
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if (IS_ERR(pctl))
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pr_err("could not register foo pin driver\n");
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}
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Pins usually have fancier names than this. You can find these in the dataheet
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for your chip. Notice that the core pinctrl.h file provides a fancy macro
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called PINCTRL_PIN() to create the struct entries. As you can see I enumerated
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the pins from 0 in the upper left corner to 63 in the lower right corner,
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this enumeration was arbitrarily chosen, in practice you need to think
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through your numbering system so that it matches the layout of registers
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and such things in your driver, or the code may become complicated. You must
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also consider matching of offsets to the GPIO ranges that may be handled by
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the pin controller.
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For a padring with 467 pads, as opposed to actual pins, I used an enumeration
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like this, walking around the edge of the chip, which seems to be industry
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standard too (all these pads had names, too):
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0 ..... 104
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466 105
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. .
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. .
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358 224
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357 .... 225
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Pin groups
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==========
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Many controllers need to deal with groups of pins, so the pin controller
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subsystem has a mechanism for enumerating groups of pins and retrieving the
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actual enumerated pins that are part of a certain group.
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|
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For example, say that we have a group of pins dealing with an SPI interface
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on { 0, 8, 16, 24 }, and a group of pins dealing with an I2C interface on pins
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on { 24, 25 }.
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These two groups are presented to the pin control subsystem by implementing
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some generic pinctrl_ops like this:
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#include <linux/pinctrl/pinctrl.h>
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struct foo_group {
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const char *name;
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const unsigned int *pins;
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const unsigned num_pins;
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};
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static unsigned int spi0_pins[] = { 0, 8, 16, 24 };
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static unsigned int i2c0_pins[] = { 24, 25 };
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static const struct foo_group foo_groups[] = {
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{
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.name = "spi0_grp",
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.pins = spi0_pins,
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.num_pins = ARRAY_SIZE(spi0_pins),
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},
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{
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.name = "i2c0_grp",
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.pins = i2c0_pins,
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.num_pins = ARRAY_SIZE(i2c0_pins),
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},
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};
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|
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static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector)
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{
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if (selector >= ARRAY_SIZE(foo_groups))
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return -EINVAL;
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return 0;
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}
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static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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return foo_groups[selector].name;
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}
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static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned ** const pins,
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unsigned * const num_pins)
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{
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*pins = (unsigned *) foo_groups[selector].pins;
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*num_pins = foo_groups[selector].num_pins;
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return 0;
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}
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|
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static struct pinctrl_ops foo_pctrl_ops = {
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.list_groups = foo_list_groups,
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.get_group_name = foo_get_group_name,
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.get_group_pins = foo_get_group_pins,
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};
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||||
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static struct pinctrl_desc foo_desc = {
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...
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.pctlops = &foo_pctrl_ops,
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};
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|
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The pin control subsystem will call the .list_groups() function repeatedly
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||||
beginning on 0 until it returns non-zero to determine legal selectors, then
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it will call the other functions to retrieve the name and pins of the group.
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||||
Maintaining the data structure of the groups is up to the driver, this is
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just a simple example - in practice you may need more entries in your group
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structure, for example specific register ranges associated with each group
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||||
and so on.
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Interaction with the GPIO subsystem
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||||
===================================
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||||
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The GPIO drivers may want to perform operations of various types on the same
|
||||
physical pins that are also registered as pin controller pins.
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||||
Since the pin controller subsystem have its pinspace local to the pin
|
||||
controller we need a mapping so that the pin control subsystem can figure out
|
||||
which pin controller handles control of a certain GPIO pin. Since a single
|
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pin controller may be muxing several GPIO ranges (typically SoCs that have
|
||||
one set of pins but internally several GPIO silicon blocks, each modeled as
|
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a struct gpio_chip) any number of GPIO ranges can be added to a pin controller
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||||
instance like this:
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||||
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struct gpio_chip chip_a;
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||||
struct gpio_chip chip_b;
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static struct pinctrl_gpio_range gpio_range_a = {
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.name = "chip a",
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||||
.id = 0,
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||||
.base = 32,
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.npins = 16,
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.gc = &chip_a;
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||||
};
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||||
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static struct pinctrl_gpio_range gpio_range_a = {
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.name = "chip b",
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.id = 0,
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.base = 48,
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.npins = 8,
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.gc = &chip_b;
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||||
};
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||||
|
||||
|
||||
{
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struct pinctrl_dev *pctl;
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||||
...
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||||
pinctrl_add_gpio_range(pctl, &gpio_range_a);
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pinctrl_add_gpio_range(pctl, &gpio_range_b);
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}
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So this complex system has one pin controller handling two different
|
||||
GPIO chips. Chip a has 16 pins and chip b has 8 pins. They are mapped in
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the global GPIO pin space at:
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chip a: [32 .. 47]
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chip b: [48 .. 55]
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When GPIO-specific functions in the pin control subsystem are called, these
|
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ranges will be used to look up the apropriate pin controller by inspecting
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||||
and matching the pin to the pin ranges across all controllers. When a
|
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pin controller handling the matching range is found, GPIO-specific functions
|
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will be called on that specific pin controller.
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For all functionalities dealing with pin biasing, pin muxing etc, the pin
|
||||
controller subsystem will subtract the range's .base offset from the passed
|
||||
in gpio pin number, and pass that on to the pin control driver, so the driver
|
||||
will get an offset into its handled number range. Further it is also passed
|
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the range ID value, so that the pin controller knows which range it should
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deal with.
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||||
For example: if a user issues pinctrl_gpio_set_foo(50), the pin control
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||||
subsystem will find that the second range on this pin controller matches,
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||||
subtract the base 48 and call the
|
||||
pinctrl_driver_gpio_set_foo(pinctrl, range, 2) where the latter function has
|
||||
this signature:
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int pinctrl_driver_gpio_set_foo(struct pinctrl_dev *pctldev,
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||||
struct pinctrl_gpio_range *rangeid,
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unsigned offset);
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Now the driver knows that we want to do some GPIO-specific operation on the
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second GPIO range handled by "chip b", at offset 2 in that specific range.
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||||
(If the GPIO subsystem is ever refactored to use a local per-GPIO controller
|
||||
pin space, this mapping will need to be augmented accordingly.)
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||||
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PINMUX interfaces
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||||
=================
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||||
These calls use the pinmux_* naming prefix. No other calls should use that
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||||
prefix.
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||||
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||||
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What is pinmuxing?
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||||
==================
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||||
|
||||
PINMUX, also known as padmux, ballmux, alternate functions or mission modes
|
||||
is a way for chip vendors producing some kind of electrical packages to use
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a certain physical pin (ball, pad, finger, etc) for multiple mutually exclusive
|
||||
functions, depending on the application. By "application" in this context
|
||||
we usually mean a way of soldering or wiring the package into an electronic
|
||||
system, even though the framework makes it possible to also change the function
|
||||
at runtime.
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||||
|
||||
Here is an example of a PGA (Pin Grid Array) chip seen from underneath:
|
||||
|
||||
A B C D E F G H
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||||
+---+
|
||||
8 | o | o o o o o o o
|
||||
| |
|
||||
7 | o | o o o o o o o
|
||||
| |
|
||||
6 | o | o o o o o o o
|
||||
+---+---+
|
||||
5 | o | o | o o o o o o
|
||||
+---+---+ +---+
|
||||
4 o o o o o o | o | o
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||||
| |
|
||||
3 o o o o o o | o | o
|
||||
| |
|
||||
2 o o o o o o | o | o
|
||||
+-------+-------+-------+---+---+
|
||||
1 | o o | o o | o o | o | o |
|
||||
+-------+-------+-------+---+---+
|
||||
|
||||
This is not tetris. The game to think of is chess. Not all PGA/BGA packages
|
||||
are chessboard-like, big ones have "holes" in some arrangement according to
|
||||
different design patterns, but we're using this as a simple example. Of the
|
||||
pins you see some will be taken by things like a few VCC and GND to feed power
|
||||
to the chip, and quite a few will be taken by large ports like an external
|
||||
memory interface. The remaining pins will often be subject to pin multiplexing.
|
||||
|
||||
The example 8x8 PGA package above will have pin numbers 0 thru 63 assigned to
|
||||
its physical pins. It will name the pins { A1, A2, A3 ... H6, H7, H8 } using
|
||||
pinctrl_register_pins() and a suitable data set as shown earlier.
|
||||
|
||||
In this 8x8 BGA package the pins { A8, A7, A6, A5 } can be used as an SPI port
|
||||
(these are four pins: CLK, RXD, TXD, FRM). In that case, pin B5 can be used as
|
||||
some general-purpose GPIO pin. However, in another setting, pins { A5, B5 } can
|
||||
be used as an I2C port (these are just two pins: SCL, SDA). Needless to say,
|
||||
we cannot use the SPI port and I2C port at the same time. However in the inside
|
||||
of the package the silicon performing the SPI logic can alternatively be routed
|
||||
out on pins { G4, G3, G2, G1 }.
|
||||
|
||||
On the botton row at { A1, B1, C1, D1, E1, F1, G1, H1 } we have something
|
||||
special - it's an external MMC bus that can be 2, 4 or 8 bits wide, and it will
|
||||
consume 2, 4 or 8 pins respectively, so either { A1, B1 } are taken or
|
||||
{ A1, B1, C1, D1 } or all of them. If we use all 8 bits, we cannot use the SPI
|
||||
port on pins { G4, G3, G2, G1 } of course.
|
||||
|
||||
This way the silicon blocks present inside the chip can be multiplexed "muxed"
|
||||
out on different pin ranges. Often contemporary SoC (systems on chip) will
|
||||
contain several I2C, SPI, SDIO/MMC, etc silicon blocks that can be routed to
|
||||
different pins by pinmux settings.
|
||||
|
||||
Since general-purpose I/O pins (GPIO) are typically always in shortage, it is
|
||||
common to be able to use almost any pin as a GPIO pin if it is not currently
|
||||
in use by some other I/O port.
|
||||
|
||||
|
||||
Pinmux conventions
|
||||
==================
|
||||
|
||||
The purpose of the pinmux functionality in the pin controller subsystem is to
|
||||
abstract and provide pinmux settings to the devices you choose to instantiate
|
||||
in your machine configuration. It is inspired by the clk, GPIO and regulator
|
||||
subsystems, so devices will request their mux setting, but it's also possible
|
||||
to request a single pin for e.g. GPIO.
|
||||
|
||||
Definitions:
|
||||
|
||||
- FUNCTIONS can be switched in and out by a driver residing with the pin
|
||||
control subsystem in the drivers/pinctrl/* directory of the kernel. The
|
||||
pin control driver knows the possible functions. In the example above you can
|
||||
identify three pinmux functions, one for spi, one for i2c and one for mmc.
|
||||
|
||||
- FUNCTIONS are assumed to be enumerable from zero in a one-dimensional array.
|
||||
In this case the array could be something like: { spi0, i2c0, mmc0 }
|
||||
for the three available functions.
|
||||
|
||||
- FUNCTIONS have PIN GROUPS as defined on the generic level - so a certain
|
||||
function is *always* associated with a certain set of pin groups, could
|
||||
be just a single one, but could also be many. In the example above the
|
||||
function i2c is associated with the pins { A5, B5 }, enumerated as
|
||||
{ 24, 25 } in the controller pin space.
|
||||
|
||||
The Function spi is associated with pin groups { A8, A7, A6, A5 }
|
||||
and { G4, G3, G2, G1 }, which are enumerated as { 0, 8, 16, 24 } and
|
||||
{ 38, 46, 54, 62 } respectively.
|
||||
|
||||
Group names must be unique per pin controller, no two groups on the same
|
||||
controller may have the same name.
|
||||
|
||||
- The combination of a FUNCTION and a PIN GROUP determine a certain function
|
||||
for a certain set of pins. The knowledge of the functions and pin groups
|
||||
and their machine-specific particulars are kept inside the pinmux driver,
|
||||
from the outside only the enumerators are known, and the driver core can:
|
||||
|
||||
- Request the name of a function with a certain selector (>= 0)
|
||||
- A list of groups associated with a certain function
|
||||
- Request that a certain group in that list to be activated for a certain
|
||||
function
|
||||
|
||||
As already described above, pin groups are in turn self-descriptive, so
|
||||
the core will retrieve the actual pin range in a certain group from the
|
||||
driver.
|
||||
|
||||
- FUNCTIONS and GROUPS on a certain PIN CONTROLLER are MAPPED to a certain
|
||||
device by the board file, device tree or similar machine setup configuration
|
||||
mechanism, similar to how regulators are connected to devices, usually by
|
||||
name. Defining a pin controller, function and group thus uniquely identify
|
||||
the set of pins to be used by a certain device. (If only one possible group
|
||||
of pins is available for the function, no group name need to be supplied -
|
||||
the core will simply select the first and only group available.)
|
||||
|
||||
In the example case we can define that this particular machine shall
|
||||
use device spi0 with pinmux function fspi0 group gspi0 and i2c0 on function
|
||||
fi2c0 group gi2c0, on the primary pin controller, we get mappings
|
||||
like these:
|
||||
|
||||
{
|
||||
{"map-spi0", spi0, pinctrl0, fspi0, gspi0},
|
||||
{"map-i2c0", i2c0, pinctrl0, fi2c0, gi2c0}
|
||||
}
|
||||
|
||||
Every map must be assigned a symbolic name, pin controller and function.
|
||||
The group is not compulsory - if it is omitted the first group presented by
|
||||
the driver as applicable for the function will be selected, which is
|
||||
useful for simple cases.
|
||||
|
||||
The device name is present in map entries tied to specific devices. Maps
|
||||
without device names are referred to as SYSTEM pinmuxes, such as can be taken
|
||||
by the machine implementation on boot and not tied to any specific device.
|
||||
|
||||
It is possible to map several groups to the same combination of device,
|
||||
pin controller and function. This is for cases where a certain function on
|
||||
a certain pin controller may use different sets of pins in different
|
||||
configurations.
|
||||
|
||||
- PINS for a certain FUNCTION using a certain PIN GROUP on a certain
|
||||
PIN CONTROLLER are provided on a first-come first-serve basis, so if some
|
||||
other device mux setting or GPIO pin request has already taken your physical
|
||||
pin, you will be denied the use of it. To get (activate) a new setting, the
|
||||
old one has to be put (deactivated) first.
|
||||
|
||||
Sometimes the documentation and hardware registers will be oriented around
|
||||
pads (or "fingers") rather than pins - these are the soldering surfaces on the
|
||||
silicon inside the package, and may or may not match the actual number of
|
||||
pins/balls underneath the capsule. Pick some enumeration that makes sense to
|
||||
you. Define enumerators only for the pins you can control if that makes sense.
|
||||
|
||||
Assumptions:
|
||||
|
||||
We assume that the number possible function maps to pin groups is limited by
|
||||
the hardware. I.e. we assume that there is no system where any function can be
|
||||
mapped to any pin, like in a phone exchange. So the available pins groups for
|
||||
a certain function will be limited to a few choices (say up to eight or so),
|
||||
not hundreds or any amount of choices. This is the characteristic we have found
|
||||
by inspecting available pinmux hardware, and a necessary assumption since we
|
||||
expect pinmux drivers to present *all* possible function vs pin group mappings
|
||||
to the subsystem.
|
||||
|
||||
|
||||
Pinmux drivers
|
||||
==============
|
||||
|
||||
The pinmux core takes care of preventing conflicts on pins and calling
|
||||
the pin controller driver to execute different settings.
|
||||
|
||||
It is the responsibility of the pinmux driver to impose further restrictions
|
||||
(say for example infer electronic limitations due to load etc) to determine
|
||||
whether or not the requested function can actually be allowed, and in case it
|
||||
is possible to perform the requested mux setting, poke the hardware so that
|
||||
this happens.
|
||||
|
||||
Pinmux drivers are required to supply a few callback functions, some are
|
||||
optional. Usually the enable() and disable() functions are implemented,
|
||||
writing values into some certain registers to activate a certain mux setting
|
||||
for a certain pin.
|
||||
|
||||
A simple driver for the above example will work by setting bits 0, 1, 2, 3 or 4
|
||||
into some register named MUX to select a certain function with a certain
|
||||
group of pins would work something like this:
|
||||
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
|
||||
struct foo_group {
|
||||
const char *name;
|
||||
const unsigned int *pins;
|
||||
const unsigned num_pins;
|
||||
};
|
||||
|
||||
static const unsigned spi0_0_pins[] = { 0, 8, 16, 24 };
|
||||
static const unsigned spi0_1_pins[] = { 38, 46, 54, 62 };
|
||||
static const unsigned i2c0_pins[] = { 24, 25 };
|
||||
static const unsigned mmc0_1_pins[] = { 56, 57 };
|
||||
static const unsigned mmc0_2_pins[] = { 58, 59 };
|
||||
static const unsigned mmc0_3_pins[] = { 60, 61, 62, 63 };
|
||||
|
||||
static const struct foo_group foo_groups[] = {
|
||||
{
|
||||
.name = "spi0_0_grp",
|
||||
.pins = spi0_0_pins,
|
||||
.num_pins = ARRAY_SIZE(spi0_0_pins),
|
||||
},
|
||||
{
|
||||
.name = "spi0_1_grp",
|
||||
.pins = spi0_1_pins,
|
||||
.num_pins = ARRAY_SIZE(spi0_1_pins),
|
||||
},
|
||||
{
|
||||
.name = "i2c0_grp",
|
||||
.pins = i2c0_pins,
|
||||
.num_pins = ARRAY_SIZE(i2c0_pins),
|
||||
},
|
||||
{
|
||||
.name = "mmc0_1_grp",
|
||||
.pins = mmc0_1_pins,
|
||||
.num_pins = ARRAY_SIZE(mmc0_1_pins),
|
||||
},
|
||||
{
|
||||
.name = "mmc0_2_grp",
|
||||
.pins = mmc0_2_pins,
|
||||
.num_pins = ARRAY_SIZE(mmc0_2_pins),
|
||||
},
|
||||
{
|
||||
.name = "mmc0_3_grp",
|
||||
.pins = mmc0_3_pins,
|
||||
.num_pins = ARRAY_SIZE(mmc0_3_pins),
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector)
|
||||
{
|
||||
if (selector >= ARRAY_SIZE(foo_groups))
|
||||
return -EINVAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
|
||||
unsigned selector)
|
||||
{
|
||||
return foo_groups[selector].name;
|
||||
}
|
||||
|
||||
static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
|
||||
unsigned ** const pins,
|
||||
unsigned * const num_pins)
|
||||
{
|
||||
*pins = (unsigned *) foo_groups[selector].pins;
|
||||
*num_pins = foo_groups[selector].num_pins;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct pinctrl_ops foo_pctrl_ops = {
|
||||
.list_groups = foo_list_groups,
|
||||
.get_group_name = foo_get_group_name,
|
||||
.get_group_pins = foo_get_group_pins,
|
||||
};
|
||||
|
||||
struct foo_pmx_func {
|
||||
const char *name;
|
||||
const char * const *groups;
|
||||
const unsigned num_groups;
|
||||
};
|
||||
|
||||
static const char * const spi0_groups[] = { "spi0_1_grp" };
|
||||
static const char * const i2c0_groups[] = { "i2c0_grp" };
|
||||
static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp",
|
||||
"mmc0_3_grp" };
|
||||
|
||||
static const struct foo_pmx_func foo_functions[] = {
|
||||
{
|
||||
.name = "spi0",
|
||||
.groups = spi0_groups,
|
||||
.num_groups = ARRAY_SIZE(spi0_groups),
|
||||
},
|
||||
{
|
||||
.name = "i2c0",
|
||||
.groups = i2c0_groups,
|
||||
.num_groups = ARRAY_SIZE(i2c0_groups),
|
||||
},
|
||||
{
|
||||
.name = "mmc0",
|
||||
.groups = mmc0_groups,
|
||||
.num_groups = ARRAY_SIZE(mmc0_groups),
|
||||
},
|
||||
};
|
||||
|
||||
int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)
|
||||
{
|
||||
if (selector >= ARRAY_SIZE(foo_functions))
|
||||
return -EINVAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
|
||||
{
|
||||
return myfuncs[selector].name;
|
||||
}
|
||||
|
||||
static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
|
||||
const char * const **groups,
|
||||
unsigned * const num_groups)
|
||||
{
|
||||
*groups = foo_functions[selector].groups;
|
||||
*num_groups = foo_functions[selector].num_groups;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int foo_enable(struct pinctrl_dev *pctldev, unsigned selector,
|
||||
unsigned group)
|
||||
{
|
||||
u8 regbit = (1 << group);
|
||||
|
||||
writeb((readb(MUX)|regbit), MUX)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int foo_disable(struct pinctrl_dev *pctldev, unsigned selector,
|
||||
unsigned group)
|
||||
{
|
||||
u8 regbit = (1 << group);
|
||||
|
||||
writeb((readb(MUX) & ~(regbit)), MUX)
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct pinmux_ops foo_pmxops = {
|
||||
.list_functions = foo_list_funcs,
|
||||
.get_function_name = foo_get_fname,
|
||||
.get_function_groups = foo_get_groups,
|
||||
.enable = foo_enable,
|
||||
.disable = foo_disable,
|
||||
};
|
||||
|
||||
/* Pinmux operations are handled by some pin controller */
|
||||
static struct pinctrl_desc foo_desc = {
|
||||
...
|
||||
.pctlops = &foo_pctrl_ops,
|
||||
.pmxops = &foo_pmxops,
|
||||
};
|
||||
|
||||
In the example activating muxing 0 and 1 at the same time setting bits
|
||||
0 and 1, uses one pin in common so they would collide.
|
||||
|
||||
The beauty of the pinmux subsystem is that since it keeps track of all
|
||||
pins and who is using them, it will already have denied an impossible
|
||||
request like that, so the driver does not need to worry about such
|
||||
things - when it gets a selector passed in, the pinmux subsystem makes
|
||||
sure no other device or GPIO assignment is already using the selected
|
||||
pins. Thus bits 0 and 1 in the control register will never be set at the
|
||||
same time.
|
||||
|
||||
All the above functions are mandatory to implement for a pinmux driver.
|
||||
|
||||
|
||||
Pinmux interaction with the GPIO subsystem
|
||||
==========================================
|
||||
|
||||
The function list could become long, especially if you can convert every
|
||||
individual pin into a GPIO pin independent of any other pins, and then try
|
||||
the approach to define every pin as a function.
|
||||
|
||||
In this case, the function array would become 64 entries for each GPIO
|
||||
setting and then the device functions.
|
||||
|
||||
For this reason there is an additional function a pinmux driver can implement
|
||||
to enable only GPIO on an individual pin: .gpio_request_enable(). The same
|
||||
.free() function as for other functions is assumed to be usable also for
|
||||
GPIO pins.
|
||||
|
||||
This function will pass in the affected GPIO range identified by the pin
|
||||
controller core, so you know which GPIO pins are being affected by the request
|
||||
operation.
|
||||
|
||||
Alternatively it is fully allowed to use named functions for each GPIO
|
||||
pin, the pinmux_request_gpio() will attempt to obtain the function "gpioN"
|
||||
where "N" is the global GPIO pin number if no special GPIO-handler is
|
||||
registered.
|
||||
|
||||
|
||||
Pinmux board/machine configuration
|
||||
==================================
|
||||
|
||||
Boards and machines define how a certain complete running system is put
|
||||
together, including how GPIOs and devices are muxed, how regulators are
|
||||
constrained and how the clock tree looks. Of course pinmux settings are also
|
||||
part of this.
|
||||
|
||||
A pinmux config for a machine looks pretty much like a simple regulator
|
||||
configuration, so for the example array above we want to enable i2c and
|
||||
spi on the second function mapping:
|
||||
|
||||
#include <linux/pinctrl/machine.h>
|
||||
|
||||
static struct pinmux_map pmx_mapping[] = {
|
||||
{
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "spi0",
|
||||
.dev_name = "foo-spi.0",
|
||||
},
|
||||
{
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "i2c0",
|
||||
.dev_name = "foo-i2c.0",
|
||||
},
|
||||
{
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
};
|
||||
|
||||
The dev_name here matches to the unique device name that can be used to look
|
||||
up the device struct (just like with clockdev or regulators). The function name
|
||||
must match a function provided by the pinmux driver handling this pin range.
|
||||
|
||||
As you can see we may have several pin controllers on the system and thus
|
||||
we need to specify which one of them that contain the functions we wish
|
||||
to map. The map can also use struct device * directly, so there is no
|
||||
inherent need to use strings to specify .dev_name or .ctrl_dev_name, these
|
||||
are for the situation where you do not have a handle to the struct device *,
|
||||
for example if they are not yet instantiated or cumbersome to obtain.
|
||||
|
||||
You register this pinmux mapping to the pinmux subsystem by simply:
|
||||
|
||||
ret = pinmux_register_mappings(&pmx_mapping, ARRAY_SIZE(pmx_mapping));
|
||||
|
||||
Since the above construct is pretty common there is a helper macro to make
|
||||
it even more compact which assumes you want to use pinctrl.0 and position
|
||||
0 for mapping, for example:
|
||||
|
||||
static struct pinmux_map pmx_mapping[] = {
|
||||
PINMUX_MAP_PRIMARY("I2CMAP", "i2c0", "foo-i2c.0"),
|
||||
};
|
||||
|
||||
|
||||
Complex mappings
|
||||
================
|
||||
|
||||
As it is possible to map a function to different groups of pins an optional
|
||||
.group can be specified like this:
|
||||
|
||||
...
|
||||
{
|
||||
.name = "spi0-pos-A",
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "spi0",
|
||||
.group = "spi0_0_grp",
|
||||
.dev_name = "foo-spi.0",
|
||||
},
|
||||
{
|
||||
.name = "spi0-pos-B",
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "spi0",
|
||||
.group = "spi0_1_grp",
|
||||
.dev_name = "foo-spi.0",
|
||||
},
|
||||
...
|
||||
|
||||
This example mapping is used to switch between two positions for spi0 at
|
||||
runtime, as described further below under the heading "Runtime pinmuxing".
|
||||
|
||||
Further it is possible to match several groups of pins to the same function
|
||||
for a single device, say for example in the mmc0 example above, where you can
|
||||
additively expand the mmc0 bus from 2 to 4 to 8 pins. If we want to use all
|
||||
three groups for a total of 2+2+4 = 8 pins (for an 8-bit MMC bus as is the
|
||||
case), we define a mapping like this:
|
||||
|
||||
...
|
||||
{
|
||||
.name "2bit"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_0_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "4bit"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_0_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "4bit"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_1_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "8bit"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_0_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "8bit"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_1_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
{
|
||||
.name "8bit"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "mmc0",
|
||||
.group = "mmc0_2_grp",
|
||||
.dev_name = "foo-mmc.0",
|
||||
},
|
||||
...
|
||||
|
||||
The result of grabbing this mapping from the device with something like
|
||||
this (see next paragraph):
|
||||
|
||||
pmx = pinmux_get(&device, "8bit");
|
||||
|
||||
Will be that you activate all the three bottom records in the mapping at
|
||||
once. Since they share the same name, pin controller device, funcion and
|
||||
device, and since we allow multiple groups to match to a single device, they
|
||||
all get selected, and they all get enabled and disable simultaneously by the
|
||||
pinmux core.
|
||||
|
||||
|
||||
Pinmux requests from drivers
|
||||
============================
|
||||
|
||||
Generally it is discouraged to let individual drivers get and enable pinmuxes.
|
||||
So if possible, handle the pinmuxes in platform code or some other place where
|
||||
you have access to all the affected struct device * pointers. In some cases
|
||||
where a driver needs to switch between different mux mappings at runtime
|
||||
this is not possible.
|
||||
|
||||
A driver may request a certain mux to be activated, usually just the default
|
||||
mux like this:
|
||||
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
|
||||
struct foo_state {
|
||||
struct pinmux *pmx;
|
||||
...
|
||||
};
|
||||
|
||||
foo_probe()
|
||||
{
|
||||
/* Allocate a state holder named "state" etc */
|
||||
struct pinmux pmx;
|
||||
|
||||
pmx = pinmux_get(&device, NULL);
|
||||
if IS_ERR(pmx)
|
||||
return PTR_ERR(pmx);
|
||||
pinmux_enable(pmx);
|
||||
|
||||
state->pmx = pmx;
|
||||
}
|
||||
|
||||
foo_remove()
|
||||
{
|
||||
pinmux_disable(state->pmx);
|
||||
pinmux_put(state->pmx);
|
||||
}
|
||||
|
||||
If you want to grab a specific mux mapping and not just the first one found for
|
||||
this device you can specify a specific mapping name, for example in the above
|
||||
example the second i2c0 setting: pinmux_get(&device, "spi0-pos-B");
|
||||
|
||||
This get/enable/disable/put sequence can just as well be handled by bus drivers
|
||||
if you don't want each and every driver to handle it and you know the
|
||||
arrangement on your bus.
|
||||
|
||||
The semantics of the get/enable respective disable/put is as follows:
|
||||
|
||||
- pinmux_get() is called in process context to reserve the pins affected with
|
||||
a certain mapping and set up the pinmux core and the driver. It will allocate
|
||||
a struct from the kernel memory to hold the pinmux state.
|
||||
|
||||
- pinmux_enable()/pinmux_disable() is quick and can be called from fastpath
|
||||
(irq context) when you quickly want to set up/tear down the hardware muxing
|
||||
when running a device driver. Usually it will just poke some values into a
|
||||
register.
|
||||
|
||||
- pinmux_disable() is called in process context to tear down the pin requests
|
||||
and release the state holder struct for the mux setting.
|
||||
|
||||
Usually the pinmux core handled the get/put pair and call out to the device
|
||||
drivers bookkeeping operations, like checking available functions and the
|
||||
associated pins, whereas the enable/disable pass on to the pin controller
|
||||
driver which takes care of activating and/or deactivating the mux setting by
|
||||
quickly poking some registers.
|
||||
|
||||
The pins are allocated for your device when you issue the pinmux_get() call,
|
||||
after this you should be able to see this in the debugfs listing of all pins.
|
||||
|
||||
|
||||
System pinmux hogging
|
||||
=====================
|
||||
|
||||
A system pinmux map entry, i.e. a pinmux setting that does not have a device
|
||||
associated with it, can be hogged by the core when the pin controller is
|
||||
registered. This means that the core will attempt to call pinmux_get() and
|
||||
pinmux_enable() on it immediately after the pin control device has been
|
||||
registered.
|
||||
|
||||
This is enabled by simply setting the .hog_on_boot field in the map to true,
|
||||
like this:
|
||||
|
||||
{
|
||||
.name "POWERMAP"
|
||||
.ctrl_dev_name = "pinctrl.0",
|
||||
.function = "power_func",
|
||||
.hog_on_boot = true,
|
||||
},
|
||||
|
||||
Since it may be common to request the core to hog a few always-applicable
|
||||
mux settings on the primary pin controller, there is a convenience macro for
|
||||
this:
|
||||
|
||||
PINMUX_MAP_PRIMARY_SYS_HOG("POWERMAP", "power_func")
|
||||
|
||||
This gives the exact same result as the above construction.
|
||||
|
||||
|
||||
Runtime pinmuxing
|
||||
=================
|
||||
|
||||
It is possible to mux a certain function in and out at runtime, say to move
|
||||
an SPI port from one set of pins to another set of pins. Say for example for
|
||||
spi0 in the example above, we expose two different groups of pins for the same
|
||||
function, but with different named in the mapping as described under
|
||||
"Advanced mapping" above. So we have two mappings named "spi0-pos-A" and
|
||||
"spi0-pos-B".
|
||||
|
||||
This snippet first muxes the function in the pins defined by group A, enables
|
||||
it, disables and releases it, and muxes it in on the pins defined by group B:
|
||||
|
||||
foo_switch()
|
||||
{
|
||||
struct pinmux pmx;
|
||||
|
||||
/* Enable on position A */
|
||||
pmx = pinmux_get(&device, "spi0-pos-A");
|
||||
if IS_ERR(pmx)
|
||||
return PTR_ERR(pmx);
|
||||
pinmux_enable(pmx);
|
||||
|
||||
/* This releases the pins again */
|
||||
pinmux_disable(pmx);
|
||||
pinmux_put(pmx);
|
||||
|
||||
/* Enable on position B */
|
||||
pmx = pinmux_get(&device, "spi0-pos-B");
|
||||
if IS_ERR(pmx)
|
||||
return PTR_ERR(pmx);
|
||||
pinmux_enable(pmx);
|
||||
...
|
||||
}
|
||||
|
||||
The above has to be done from process context.
|
||||
|
|
@ -5042,6 +5042,11 @@ L: linux-mtd@lists.infradead.org
|
|||
S: Maintained
|
||||
F: drivers/mtd/devices/phram.c
|
||||
|
||||
PIN CONTROL SUBSYSTEM
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
S: Maintained
|
||||
F: drivers/pinmux/
|
||||
|
||||
PKTCDVD DRIVER
|
||||
M: Peter Osterlund <petero2@telia.com>
|
||||
S: Maintained
|
||||
|
|
|
|||
|
|
@ -6,6 +6,8 @@ comment "ST-Ericsson Mobile Platform Products"
|
|||
|
||||
config MACH_U300
|
||||
bool "U300"
|
||||
select PINCTRL
|
||||
select PINMUX_U300
|
||||
|
||||
comment "ST-Ericsson U300/U330/U335/U365 Feature Selections"
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
# Makefile for the linux kernel, U300 machine.
|
||||
#
|
||||
|
||||
obj-y := core.o clock.o timer.o padmux.o
|
||||
obj-y := core.o clock.o timer.o
|
||||
obj-m :=
|
||||
obj-n :=
|
||||
obj- :=
|
||||
|
|
|
|||
|
|
@ -25,6 +25,8 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/fsmc.h>
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
|
||||
#include <asm/types.h>
|
||||
#include <asm/setup.h>
|
||||
|
|
@ -1535,6 +1537,14 @@ static struct coh901318_platform coh901318_platform = {
|
|||
.max_channels = U300_DMA_CHANNELS,
|
||||
};
|
||||
|
||||
static struct resource pinmux_resources[] = {
|
||||
{
|
||||
.start = U300_SYSCON_BASE,
|
||||
.end = U300_SYSCON_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device wdog_device = {
|
||||
.name = "coh901327_wdog",
|
||||
.id = -1,
|
||||
|
|
@ -1630,6 +1640,72 @@ static struct platform_device dma_device = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device pinmux_device = {
|
||||
.name = "pinmux-u300",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(pinmux_resources),
|
||||
.resource = pinmux_resources,
|
||||
};
|
||||
|
||||
/* Pinmux settings */
|
||||
static struct pinmux_map u300_pinmux_map[] = {
|
||||
/* anonymous maps for chip power and EMIFs */
|
||||
PINMUX_MAP_PRIMARY_SYS_HOG("POWER", "power"),
|
||||
PINMUX_MAP_PRIMARY_SYS_HOG("EMIF0", "emif0"),
|
||||
PINMUX_MAP_PRIMARY_SYS_HOG("EMIF1", "emif1"),
|
||||
/* per-device maps for MMC/SD, SPI and UART */
|
||||
PINMUX_MAP_PRIMARY("MMCSD", "mmc0", "mmci"),
|
||||
PINMUX_MAP_PRIMARY("SPI", "spi0", "pl022"),
|
||||
PINMUX_MAP_PRIMARY("UART0", "uart0", "uart0"),
|
||||
};
|
||||
|
||||
struct u300_mux_hog {
|
||||
const char *name;
|
||||
struct device *dev;
|
||||
struct pinmux *pmx;
|
||||
};
|
||||
|
||||
static struct u300_mux_hog u300_mux_hogs[] = {
|
||||
{
|
||||
.name = "uart0",
|
||||
.dev = &uart0_device.dev,
|
||||
},
|
||||
{
|
||||
.name = "spi0",
|
||||
.dev = &pl022_device.dev,
|
||||
},
|
||||
{
|
||||
.name = "mmc0",
|
||||
.dev = &mmcsd_device.dev,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init u300_pinmux_fetch(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(u300_mux_hogs); i++) {
|
||||
struct pinmux *pmx;
|
||||
int ret;
|
||||
|
||||
pmx = pinmux_get(u300_mux_hogs[i].dev, NULL);
|
||||
if (IS_ERR(pmx)) {
|
||||
pr_err("u300: could not get pinmux hog %s\n",
|
||||
u300_mux_hogs[i].name);
|
||||
continue;
|
||||
}
|
||||
ret = pinmux_enable(pmx);
|
||||
if (ret) {
|
||||
pr_err("u300: could enable pinmux hog %s\n",
|
||||
u300_mux_hogs[i].name);
|
||||
continue;
|
||||
}
|
||||
u300_mux_hogs[i].pmx = pmx;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
subsys_initcall(u300_pinmux_fetch);
|
||||
|
||||
/*
|
||||
* Notice that AMBA devices are initialized before platform devices.
|
||||
*
|
||||
|
|
@ -1643,10 +1719,10 @@ static struct platform_device *platform_devs[] __initdata = {
|
|||
&gpio_device,
|
||||
&nand_device,
|
||||
&wdog_device,
|
||||
&ave_device
|
||||
&ave_device,
|
||||
&pinmux_device,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
|
||||
* together so some interrupts are connected to the first one and some
|
||||
|
|
@ -1828,6 +1904,10 @@ void __init u300_init_devices(void)
|
|||
|
||||
u300_assign_physmem();
|
||||
|
||||
/* Initialize pinmuxing */
|
||||
pinmux_register_mappings(u300_pinmux_map,
|
||||
ARRAY_SIZE(u300_pinmux_map));
|
||||
|
||||
/* Register subdevices on the I2C buses */
|
||||
u300_i2c_register_board_devices();
|
||||
|
||||
|
|
|
|||
|
|
@ -234,91 +234,6 @@
|
|||
#define U300_SYSCON_ECCR_EMIF_1_RET_OUT_CLK_EN_N_DISABLE (0x0004)
|
||||
#define U300_SYSCON_ECCR_EMIF_MEMCLK_RET_EN_N_DISABLE (0x0002)
|
||||
#define U300_SYSCON_ECCR_EMIF_SDRCLK_RET_EN_N_DISABLE (0x0001)
|
||||
/* PAD MUX Control register 1 (LOW) 16bit (R/W) */
|
||||
#define U300_SYSCON_PMC1LR (0x007C)
|
||||
#define U300_SYSCON_PMC1LR_MASK (0xFFFF)
|
||||
#define U300_SYSCON_PMC1LR_CDI_MASK (0xC000)
|
||||
#define U300_SYSCON_PMC1LR_CDI_CDI (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_CDI_EMIF (0x4000)
|
||||
#ifdef CONFIG_MACH_U300_BS335
|
||||
#define U300_SYSCON_PMC1LR_CDI_CDI2 (0x8000)
|
||||
#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO (0xC000)
|
||||
#elif CONFIG_MACH_U300_BS365
|
||||
#define U300_SYSCON_PMC1LR_CDI_GPIO (0x8000)
|
||||
#define U300_SYSCON_PMC1LR_CDI_WCDMA (0xC000)
|
||||
#endif
|
||||
#define U300_SYSCON_PMC1LR_PDI_MASK (0x3000)
|
||||
#define U300_SYSCON_PMC1LR_PDI_PDI (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_PDI_EGG (0x1000)
|
||||
#define U300_SYSCON_PMC1LR_PDI_WCDMA (0x3000)
|
||||
#define U300_SYSCON_PMC1LR_MMCSD_MASK (0x0C00)
|
||||
#define U300_SYSCON_PMC1LR_MMCSD_MMCSD (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_MMCSD_MSPRO (0x0400)
|
||||
#define U300_SYSCON_PMC1LR_MMCSD_DSP (0x0800)
|
||||
#define U300_SYSCON_PMC1LR_MMCSD_WCDMA (0x0C00)
|
||||
#define U300_SYSCON_PMC1LR_ETM_MASK (0x0300)
|
||||
#define U300_SYSCON_PMC1LR_ETM_ACC (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_ETM_APP (0x0100)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS2_MASK (0x00C0)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS2_NFIF (0x0040)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS2_SDRAM (0x0080)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC_2GB (0x00C0)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS1_MASK (0x0030)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS1_STATIC (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS1_NFIF (0x0010)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SDRAM (0x0020)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SEMI (0x0030)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS0_MASK (0x000C)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS0_STATIC (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS0_NFIF (0x0004)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SDRAM (0x0008)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SEMI (0x000C)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_MASK (0x0003)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_STATIC (0x0000)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM0 (0x0001)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM1 (0x0002)
|
||||
#define U300_SYSCON_PMC1LR_EMIF_1 (0x0003)
|
||||
/* PAD MUX Control register 2 (HIGH) 16bit (R/W) */
|
||||
#define U300_SYSCON_PMC1HR (0x007E)
|
||||
#define U300_SYSCON_PMC1HR_MASK (0xFFFF)
|
||||
#define U300_SYSCON_PMC1HR_MISC_2_MASK (0xC000)
|
||||
#define U300_SYSCON_PMC1HR_MISC_2_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_MISC_2_MSPRO (0x4000)
|
||||
#define U300_SYSCON_PMC1HR_MISC_2_DSP (0x8000)
|
||||
#define U300_SYSCON_PMC1HR_MISC_2_AAIF (0xC000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_2_MASK (0x3000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_2_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_2_NFIF (0x1000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_2_DSP (0x2000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_2_AAIF (0x3000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_1_MASK (0x0C00)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_1_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_1_MMC (0x0400)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_1_DSP (0x0800)
|
||||
#define U300_SYSCON_PMC1HR_APP_GPIO_1_AAIF (0x0C00)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK (0x0300)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI (0x0100)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_AAIF (0x0300)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK (0x00C0)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI (0x0040)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_AAIF (0x00C0)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_2_MASK (0x0030)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_2_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_2_SPI (0x0010)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_2_DSP (0x0020)
|
||||
#define U300_SYSCON_PMC1HR_APP_SPI_2_AAIF (0x0030)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_2_MASK (0x000C)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_2_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_2_UART0 (0x0004)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_2_NFIF_CS (0x0008)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_2_AAIF (0x000C)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_1_MASK (0x0003)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_1_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_1_UART0 (0x0001)
|
||||
#define U300_SYSCON_PMC1HR_APP_UART0_1_AAIF (0x0003)
|
||||
/* Step one for killing the applications system 16bit (-/W) */
|
||||
#define U300_SYSCON_KA1R (0x0080)
|
||||
#define U300_SYSCON_KA1R_MASK (0xFFFF)
|
||||
|
|
@ -357,57 +272,6 @@
|
|||
#define U300_SYSCON_PUCR_EMIF_1_16BIT_PU_ENABLE (0x0080)
|
||||
#define U300_SYSCON_PUCR_EMIF_1_8BIT_PU_ENABLE (0x0040)
|
||||
#define U300_SYSCON_PUCR_KEY_IN_PU_EN_MASK (0x003F)
|
||||
/* Padmux 2 control */
|
||||
#define U300_SYSCON_PMC2R (0x100)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_0_MASK (0x00C0)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM (0x0040)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_0_MMC (0x0080)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2 (0x00C0)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_1_MASK (0x0300)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM (0x0100)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_1_MMC (0x0200)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2 (0x0300)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_2_MASK (0x0C00)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM (0x0400)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_2_MMC (0x0800)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2 (0x0C00)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_3_MASK (0x3000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM (0x1000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_3_MMC (0x2000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2 (0x3000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_4_MASK (0xC000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM (0x4000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_4_MMC (0x8000)
|
||||
#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO (0xC000)
|
||||
/* TODO: More SYSCON registers missing */
|
||||
#define U300_SYSCON_PMC3R (0x10c)
|
||||
#define U300_SYSCON_PMC3R_APP_MISC_11_MASK (0xc000)
|
||||
#define U300_SYSCON_PMC3R_APP_MISC_11_SPI (0x4000)
|
||||
#define U300_SYSCON_PMC3R_APP_MISC_10_MASK (0x3000)
|
||||
#define U300_SYSCON_PMC3R_APP_MISC_10_SPI (0x1000)
|
||||
/* TODO: Missing other configs */
|
||||
#define U300_SYSCON_PMC4R (0x168)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_12_MASK (0x0003)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO (0x0000)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_13_MASK (0x000C)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_13_CDI (0x0000)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA (0x0004)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2 (0x0008)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO (0x000C)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_14_MASK (0x0030)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_14_CDI (0x0000)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA (0x0010)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2 (0x0020)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO (0x0030)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_16_MASK (0x0300)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13 (0x0000)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS (0x0100)
|
||||
#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N (0x0200)
|
||||
/* SYS_0_CLK_CONTROL first clock control 16bit (R/W) */
|
||||
#define U300_SYSCON_S0CCR (0x120)
|
||||
#define U300_SYSCON_S0CCR_FIELD_MASK (0x43FF)
|
||||
|
|
|
|||
|
|
@ -21,7 +21,6 @@
|
|||
#include <mach/dma_channels.h>
|
||||
|
||||
#include "mmc.h"
|
||||
#include "padmux.h"
|
||||
|
||||
static struct mmci_platform_data mmc0_plat_data = {
|
||||
/*
|
||||
|
|
@ -45,24 +44,9 @@ static struct mmci_platform_data mmc0_plat_data = {
|
|||
int __devinit mmc_init(struct amba_device *adev)
|
||||
{
|
||||
struct device *mmcsd_device = &adev->dev;
|
||||
struct pmx *pmx;
|
||||
int ret = 0;
|
||||
|
||||
mmcsd_device->platform_data = &mmc0_plat_data;
|
||||
|
||||
/*
|
||||
* Setup padmuxing for MMC. Since this must always be
|
||||
* compiled into the kernel, pmx is never released.
|
||||
*/
|
||||
pmx = pmx_get(mmcsd_device, U300_APP_PMX_MMC_SETTING);
|
||||
|
||||
if (IS_ERR(pmx))
|
||||
pr_warning("Could not get padmux handle\n");
|
||||
else {
|
||||
ret = pmx_activate(mmcsd_device, pmx);
|
||||
if (IS_ERR_VALUE(ret))
|
||||
pr_warning("Could not activate padmuxing\n");
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,367 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* arch/arm/mach-u300/padmux.c
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2009 ST-Ericsson AB
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
* U300 PADMUX functions
|
||||
* Author: Martin Persson <martin.persson@stericsson.com>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/bug.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <mach/u300-regs.h>
|
||||
#include <mach/syscon.h>
|
||||
#include "padmux.h"
|
||||
|
||||
static DEFINE_MUTEX(pmx_mutex);
|
||||
|
||||
const u32 pmx_registers[] = {
|
||||
(U300_SYSCON_VBASE + U300_SYSCON_PMC1LR),
|
||||
(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR),
|
||||
(U300_SYSCON_VBASE + U300_SYSCON_PMC2R),
|
||||
(U300_SYSCON_VBASE + U300_SYSCON_PMC3R),
|
||||
(U300_SYSCON_VBASE + U300_SYSCON_PMC4R)
|
||||
};
|
||||
|
||||
/* High level functionality */
|
||||
|
||||
/* Lazy dog:
|
||||
* onmask = {
|
||||
* {"PMC1LR" mask, "PMC1LR" value},
|
||||
* {"PMC1HR" mask, "PMC1HR" value},
|
||||
* {"PMC2R" mask, "PMC2R" value},
|
||||
* {"PMC3R" mask, "PMC3R" value},
|
||||
* {"PMC4R" mask, "PMC4R" value}
|
||||
* }
|
||||
*/
|
||||
static struct pmx mmc_setting = {
|
||||
.setting = U300_APP_PMX_MMC_SETTING,
|
||||
.default_on = false,
|
||||
.activated = false,
|
||||
.name = "MMC",
|
||||
.onmask = {
|
||||
{U300_SYSCON_PMC1LR_MMCSD_MASK,
|
||||
U300_SYSCON_PMC1LR_MMCSD_MMCSD},
|
||||
{0, 0},
|
||||
{0, 0},
|
||||
{0, 0},
|
||||
{U300_SYSCON_PMC4R_APP_MISC_12_MASK,
|
||||
U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO}
|
||||
},
|
||||
};
|
||||
|
||||
static struct pmx spi_setting = {
|
||||
.setting = U300_APP_PMX_SPI_SETTING,
|
||||
.default_on = false,
|
||||
.activated = false,
|
||||
.name = "SPI",
|
||||
.onmask = {{0, 0},
|
||||
{U300_SYSCON_PMC1HR_APP_SPI_2_MASK |
|
||||
U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK |
|
||||
U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK,
|
||||
U300_SYSCON_PMC1HR_APP_SPI_2_SPI |
|
||||
U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI |
|
||||
U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI},
|
||||
{0, 0},
|
||||
{0, 0},
|
||||
{0, 0}
|
||||
},
|
||||
};
|
||||
|
||||
/* Available padmux settings */
|
||||
static struct pmx *pmx_settings[] = {
|
||||
&mmc_setting,
|
||||
&spi_setting,
|
||||
};
|
||||
|
||||
static void update_registers(struct pmx *pmx, bool activate)
|
||||
{
|
||||
u16 regval, val, mask;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_registers); i++) {
|
||||
if (activate)
|
||||
val = pmx->onmask[i].val;
|
||||
else
|
||||
val = 0;
|
||||
|
||||
mask = pmx->onmask[i].mask;
|
||||
if (mask != 0) {
|
||||
regval = readw(pmx_registers[i]);
|
||||
regval &= ~mask;
|
||||
regval |= val;
|
||||
writew(regval, pmx_registers[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
struct pmx *pmx_get(struct device *dev, enum pmx_settings setting)
|
||||
{
|
||||
int i;
|
||||
struct pmx *pmx = ERR_PTR(-ENOENT);
|
||||
|
||||
if (dev == NULL)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
mutex_lock(&pmx_mutex);
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
|
||||
|
||||
if (setting == pmx_settings[i]->setting) {
|
||||
|
||||
if (pmx_settings[i]->dev != NULL) {
|
||||
WARN(1, "padmux: required setting "
|
||||
"in use by another consumer\n");
|
||||
} else {
|
||||
pmx = pmx_settings[i];
|
||||
pmx->dev = dev;
|
||||
dev_dbg(dev, "padmux: setting nr %d is now "
|
||||
"bound to %s and ready to use\n",
|
||||
setting, dev_name(dev));
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
mutex_unlock(&pmx_mutex);
|
||||
|
||||
return pmx;
|
||||
}
|
||||
EXPORT_SYMBOL(pmx_get);
|
||||
|
||||
int pmx_put(struct device *dev, struct pmx *pmx)
|
||||
{
|
||||
int i;
|
||||
int ret = -ENOENT;
|
||||
|
||||
if (pmx == NULL || dev == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&pmx_mutex);
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
|
||||
|
||||
if (pmx->setting == pmx_settings[i]->setting) {
|
||||
|
||||
if (dev != pmx->dev) {
|
||||
WARN(1, "padmux: cannot release handle as "
|
||||
"it is bound to another consumer\n");
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
} else {
|
||||
pmx_settings[i]->dev = NULL;
|
||||
ret = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
mutex_unlock(&pmx_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(pmx_put);
|
||||
|
||||
int pmx_activate(struct device *dev, struct pmx *pmx)
|
||||
{
|
||||
int i, j, ret;
|
||||
ret = 0;
|
||||
|
||||
if (pmx == NULL || dev == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&pmx_mutex);
|
||||
|
||||
/* Make sure the required bits are not used */
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
|
||||
|
||||
if (pmx_settings[i]->dev == NULL || pmx_settings[i] == pmx)
|
||||
continue;
|
||||
|
||||
for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
|
||||
|
||||
if (pmx_settings[i]->onmask[j].mask & pmx->
|
||||
onmask[j].mask) {
|
||||
/* More than one entry on the same bits */
|
||||
WARN(1, "padmux: cannot activate "
|
||||
"setting. Bit conflict with "
|
||||
"an active setting\n");
|
||||
|
||||
ret = -EUSERS;
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
}
|
||||
update_registers(pmx, true);
|
||||
pmx->activated = true;
|
||||
dev_dbg(dev, "padmux: setting nr %d is activated\n",
|
||||
pmx->setting);
|
||||
|
||||
exit:
|
||||
mutex_unlock(&pmx_mutex);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(pmx_activate);
|
||||
|
||||
int pmx_deactivate(struct device *dev, struct pmx *pmx)
|
||||
{
|
||||
int i;
|
||||
int ret = -ENOENT;
|
||||
|
||||
if (pmx == NULL || dev == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&pmx_mutex);
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
|
||||
|
||||
if (pmx_settings[i]->dev == NULL)
|
||||
continue;
|
||||
|
||||
if (pmx->setting == pmx_settings[i]->setting) {
|
||||
|
||||
if (dev != pmx->dev) {
|
||||
WARN(1, "padmux: cannot deactivate "
|
||||
"pmx setting as it was activated "
|
||||
"by another consumer\n");
|
||||
|
||||
ret = -EBUSY;
|
||||
continue;
|
||||
} else {
|
||||
update_registers(pmx, false);
|
||||
pmx_settings[i]->dev = NULL;
|
||||
pmx->activated = false;
|
||||
ret = 0;
|
||||
dev_dbg(dev, "padmux: setting nr %d is deactivated",
|
||||
pmx->setting);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
mutex_unlock(&pmx_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(pmx_deactivate);
|
||||
|
||||
/*
|
||||
* For internal use only. If it is to be exported,
|
||||
* it should be reentrant. Notice that pmx_activate
|
||||
* (i.e. runtime settings) always override default settings.
|
||||
*/
|
||||
static int pmx_set_default(void)
|
||||
{
|
||||
/* Used to identify several entries on the same bits */
|
||||
u16 modbits[ARRAY_SIZE(pmx_registers)];
|
||||
|
||||
int i, j;
|
||||
|
||||
memset(modbits, 0, ARRAY_SIZE(pmx_registers) * sizeof(u16));
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
|
||||
|
||||
if (!pmx_settings[i]->default_on)
|
||||
continue;
|
||||
|
||||
for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
|
||||
|
||||
/* Make sure there is only one entry on the same bits */
|
||||
if (modbits[j] & pmx_settings[i]->onmask[j].mask) {
|
||||
BUG();
|
||||
return -EUSERS;
|
||||
}
|
||||
modbits[j] |= pmx_settings[i]->onmask[j].mask;
|
||||
}
|
||||
update_registers(pmx_settings[i], true);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
|
||||
static int pmx_show(struct seq_file *s, void *data)
|
||||
{
|
||||
int i;
|
||||
seq_printf(s, "-------------------------------------------------\n");
|
||||
seq_printf(s, "SETTING BOUND TO DEVICE STATE\n");
|
||||
seq_printf(s, "-------------------------------------------------\n");
|
||||
mutex_lock(&pmx_mutex);
|
||||
for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
|
||||
/* Format pmx and device name nicely */
|
||||
char cdp[33];
|
||||
int chars;
|
||||
|
||||
chars = snprintf(&cdp[0], 17, "%s", pmx_settings[i]->name);
|
||||
while (chars < 16) {
|
||||
cdp[chars] = ' ';
|
||||
chars++;
|
||||
}
|
||||
chars = snprintf(&cdp[16], 17, "%s", pmx_settings[i]->dev ?
|
||||
dev_name(pmx_settings[i]->dev) : "N/A");
|
||||
while (chars < 16) {
|
||||
cdp[chars+16] = ' ';
|
||||
chars++;
|
||||
}
|
||||
cdp[32] = '\0';
|
||||
|
||||
seq_printf(s,
|
||||
"%s\t%s\n",
|
||||
&cdp[0],
|
||||
pmx_settings[i]->activated ?
|
||||
"ACTIVATED" : "DEACTIVATED"
|
||||
);
|
||||
|
||||
}
|
||||
mutex_unlock(&pmx_mutex);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pmx_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, pmx_show, NULL);
|
||||
}
|
||||
|
||||
static const struct file_operations pmx_operations = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = pmx_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static int __init init_pmx_read_debugfs(void)
|
||||
{
|
||||
/* Expose a simple debugfs interface to view pmx settings */
|
||||
(void) debugfs_create_file("padmux", S_IFREG | S_IRUGO,
|
||||
NULL, NULL,
|
||||
&pmx_operations);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This needs to come in after the core_initcall(),
|
||||
* because debugfs is not available until
|
||||
* the subsystems come up.
|
||||
*/
|
||||
module_init(init_pmx_read_debugfs);
|
||||
#endif
|
||||
|
||||
static int __init pmx_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = pmx_set_default();
|
||||
|
||||
if (IS_ERR_VALUE(ret))
|
||||
pr_crit("padmux: default settings could not be set\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Should be initialized before consumers */
|
||||
core_initcall(pmx_init);
|
||||
|
|
@ -1,39 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* arch/arm/mach-u300/padmux.h
|
||||
*
|
||||
*
|
||||
* Copyright (C) 2009 ST-Ericsson AB
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
* U300 PADMUX API
|
||||
* Author: Martin Persson <martin.persson@stericsson.com>
|
||||
*/
|
||||
|
||||
#ifndef __MACH_U300_PADMUX_H
|
||||
#define __MACH_U300_PADMUX_H
|
||||
|
||||
enum pmx_settings {
|
||||
U300_APP_PMX_MMC_SETTING,
|
||||
U300_APP_PMX_SPI_SETTING
|
||||
};
|
||||
|
||||
struct pmx_onmask {
|
||||
u16 mask; /* Mask bits */
|
||||
u16 val; /* Value when active */
|
||||
};
|
||||
|
||||
struct pmx {
|
||||
struct device *dev;
|
||||
enum pmx_settings setting;
|
||||
char *name;
|
||||
bool activated;
|
||||
bool default_on;
|
||||
struct pmx_onmask onmask[];
|
||||
};
|
||||
|
||||
struct pmx *pmx_get(struct device *dev, enum pmx_settings setting);
|
||||
int pmx_put(struct device *dev, struct pmx *pmx);
|
||||
int pmx_activate(struct device *dev, struct pmx *pmx);
|
||||
int pmx_deactivate(struct device *dev, struct pmx *pmx);
|
||||
|
||||
#endif
|
||||
|
|
@ -14,8 +14,6 @@
|
|||
#include <mach/coh901318.h>
|
||||
#include <mach/dma_channels.h>
|
||||
|
||||
#include "padmux.h"
|
||||
|
||||
/*
|
||||
* The following is for the actual devices on the SSP/SPI bus
|
||||
*/
|
||||
|
|
@ -95,25 +93,7 @@ static struct pl022_ssp_controller ssp_platform_data = {
|
|||
|
||||
void __init u300_spi_init(struct amba_device *adev)
|
||||
{
|
||||
struct pmx *pmx;
|
||||
|
||||
adev->dev.platform_data = &ssp_platform_data;
|
||||
/*
|
||||
* Setup padmuxing for SPI. Since this must always be
|
||||
* compiled into the kernel, pmx is never released.
|
||||
*/
|
||||
pmx = pmx_get(&adev->dev, U300_APP_PMX_SPI_SETTING);
|
||||
|
||||
if (IS_ERR(pmx))
|
||||
dev_warn(&adev->dev, "Could not get padmux handle\n");
|
||||
else {
|
||||
int ret;
|
||||
|
||||
ret = pmx_activate(&adev->dev, pmx);
|
||||
if (IS_ERR_VALUE(ret))
|
||||
dev_warn(&adev->dev, "Could not activate padmuxing\n");
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void __init u300_spi_register_board_devices(void)
|
||||
|
|
|
|||
|
|
@ -56,6 +56,8 @@ source "drivers/pps/Kconfig"
|
|||
|
||||
source "drivers/ptp/Kconfig"
|
||||
|
||||
source "drivers/pinctrl/Kconfig"
|
||||
|
||||
source "drivers/gpio/Kconfig"
|
||||
|
||||
source "drivers/w1/Kconfig"
|
||||
|
|
|
|||
|
|
@ -5,6 +5,8 @@
|
|||
# Rewritten to use lists instead of if-statements.
|
||||
#
|
||||
|
||||
# GPIO must come after pinctrl as gpios may need to mux pins etc
|
||||
obj-y += pinctrl/
|
||||
obj-y += gpio/
|
||||
obj-$(CONFIG_PCI) += pci/
|
||||
obj-$(CONFIG_PARISC) += parisc/
|
||||
|
|
|
|||
|
|
@ -0,0 +1,43 @@
|
|||
#
|
||||
# PINCTRL infrastructure and drivers
|
||||
#
|
||||
|
||||
menuconfig PINCTRL
|
||||
bool "PINCTRL Support"
|
||||
depends on EXPERIMENTAL
|
||||
help
|
||||
This enables the PINCTRL subsystem for controlling pins
|
||||
on chip packages, for example multiplexing pins on primarily
|
||||
PGA and BGA packages for systems on chip.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
if PINCTRL
|
||||
|
||||
config PINMUX
|
||||
bool "Support pinmux controllers"
|
||||
help
|
||||
Say Y here if you want the pincontrol subsystem to handle pin
|
||||
multiplexing drivers.
|
||||
|
||||
config DEBUG_PINCTRL
|
||||
bool "Debug PINCTRL calls"
|
||||
depends on DEBUG_KERNEL
|
||||
help
|
||||
Say Y here to add some extra checks and diagnostics to PINCTRL calls.
|
||||
|
||||
config PINMUX_SIRF
|
||||
bool "CSR SiRFprimaII pinmux driver"
|
||||
depends on ARCH_PRIMA2
|
||||
select PINMUX
|
||||
help
|
||||
Say Y here to enable the SiRFprimaII pinmux driver
|
||||
|
||||
config PINMUX_U300
|
||||
bool "U300 pinmux driver"
|
||||
depends on ARCH_U300
|
||||
select PINMUX
|
||||
help
|
||||
Say Y here to enable the U300 pinmux driver
|
||||
|
||||
endif
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# generic pinmux support
|
||||
|
||||
ccflags-$(CONFIG_DEBUG_PINMUX) += -DDEBUG
|
||||
|
||||
obj-$(CONFIG_PINCTRL) += core.o
|
||||
obj-$(CONFIG_PINMUX) += pinmux.o
|
||||
obj-$(CONFIG_PINMUX_SIRF) += pinmux-sirf.o
|
||||
obj-$(CONFIG_PINMUX_U300) += pinmux-u300.o
|
||||
|
|
@ -0,0 +1,598 @@
|
|||
/*
|
||||
* Core driver for the pin control subsystem
|
||||
*
|
||||
* Copyright (C) 2011 ST-Ericsson SA
|
||||
* Written on behalf of Linaro for ST-Ericsson
|
||||
* Based on bits of regulator core, gpio core and clk core
|
||||
*
|
||||
* Author: Linus Walleij <linus.walleij@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
#define pr_fmt(fmt) "pinctrl core: " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/radix-tree.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/sysfs.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include "core.h"
|
||||
#include "pinmux.h"
|
||||
|
||||
/* Global list of pin control devices */
|
||||
static DEFINE_MUTEX(pinctrldev_list_mutex);
|
||||
static LIST_HEAD(pinctrldev_list);
|
||||
|
||||
static void pinctrl_dev_release(struct device *dev)
|
||||
{
|
||||
struct pinctrl_dev *pctldev = dev_get_drvdata(dev);
|
||||
kfree(pctldev);
|
||||
}
|
||||
|
||||
const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
/* We're not allowed to register devices without name */
|
||||
return pctldev->desc->name;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
|
||||
|
||||
void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
return pctldev->driver_data;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
|
||||
|
||||
/**
|
||||
* get_pinctrl_dev_from_dev() - look up pin controller device
|
||||
* @dev: a device pointer, this may be NULL but then devname needs to be
|
||||
* defined instead
|
||||
* @devname: the name of a device instance, as returned by dev_name(), this
|
||||
* may be NULL but then dev needs to be defined instead
|
||||
*
|
||||
* Looks up a pin control device matching a certain device name or pure device
|
||||
* pointer, the pure device pointer will take precedence.
|
||||
*/
|
||||
struct pinctrl_dev *get_pinctrl_dev_from_dev(struct device *dev,
|
||||
const char *devname)
|
||||
{
|
||||
struct pinctrl_dev *pctldev = NULL;
|
||||
bool found = false;
|
||||
|
||||
mutex_lock(&pinctrldev_list_mutex);
|
||||
list_for_each_entry(pctldev, &pinctrldev_list, node) {
|
||||
if (dev && &pctldev->dev == dev) {
|
||||
/* Matched on device pointer */
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if (devname &&
|
||||
!strcmp(dev_name(&pctldev->dev), devname)) {
|
||||
/* Matched on device name */
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
|
||||
return found ? pctldev : NULL;
|
||||
}
|
||||
|
||||
struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, int pin)
|
||||
{
|
||||
struct pin_desc *pindesc;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&pctldev->pin_desc_tree_lock, flags);
|
||||
pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, pin);
|
||||
spin_unlock_irqrestore(&pctldev->pin_desc_tree_lock, flags);
|
||||
|
||||
return pindesc;
|
||||
}
|
||||
|
||||
/**
|
||||
* pin_is_valid() - check if pin exists on controller
|
||||
* @pctldev: the pin control device to check the pin on
|
||||
* @pin: pin to check, use the local pin controller index number
|
||||
*
|
||||
* This tells us whether a certain pin exist on a certain pin controller or
|
||||
* not. Pin lists may be sparse, so some pins may not exist.
|
||||
*/
|
||||
bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
|
||||
{
|
||||
struct pin_desc *pindesc;
|
||||
|
||||
if (pin < 0)
|
||||
return false;
|
||||
|
||||
pindesc = pin_desc_get(pctldev, pin);
|
||||
if (pindesc == NULL)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pin_is_valid);
|
||||
|
||||
/* Deletes a range of pin descriptors */
|
||||
static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
|
||||
const struct pinctrl_pin_desc *pins,
|
||||
unsigned num_pins)
|
||||
{
|
||||
int i;
|
||||
|
||||
spin_lock(&pctldev->pin_desc_tree_lock);
|
||||
for (i = 0; i < num_pins; i++) {
|
||||
struct pin_desc *pindesc;
|
||||
|
||||
pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
|
||||
pins[i].number);
|
||||
if (pindesc != NULL) {
|
||||
radix_tree_delete(&pctldev->pin_desc_tree,
|
||||
pins[i].number);
|
||||
}
|
||||
kfree(pindesc);
|
||||
}
|
||||
spin_unlock(&pctldev->pin_desc_tree_lock);
|
||||
}
|
||||
|
||||
static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
|
||||
unsigned number, const char *name)
|
||||
{
|
||||
struct pin_desc *pindesc;
|
||||
|
||||
pindesc = pin_desc_get(pctldev, number);
|
||||
if (pindesc != NULL) {
|
||||
pr_err("pin %d already registered on %s\n", number,
|
||||
pctldev->desc->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
|
||||
if (pindesc == NULL)
|
||||
return -ENOMEM;
|
||||
spin_lock_init(&pindesc->lock);
|
||||
|
||||
/* Set owner */
|
||||
pindesc->pctldev = pctldev;
|
||||
|
||||
/* Copy basic pin info */
|
||||
pindesc->name = name;
|
||||
|
||||
spin_lock(&pctldev->pin_desc_tree_lock);
|
||||
radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
|
||||
spin_unlock(&pctldev->pin_desc_tree_lock);
|
||||
pr_debug("registered pin %d (%s) on %s\n",
|
||||
number, name ? name : "(unnamed)", pctldev->desc->name);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_pin_desc const *pins,
|
||||
unsigned num_descs)
|
||||
{
|
||||
unsigned i;
|
||||
int ret = 0;
|
||||
|
||||
for (i = 0; i < num_descs; i++) {
|
||||
ret = pinctrl_register_one_pin(pctldev,
|
||||
pins[i].number, pins[i].name);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
|
||||
* @pctldev: pin controller device to check
|
||||
* @gpio: gpio pin to check taken from the global GPIO pin space
|
||||
*
|
||||
* Tries to match a GPIO pin number to the ranges handled by a certain pin
|
||||
* controller, return the range or NULL
|
||||
*/
|
||||
static struct pinctrl_gpio_range *
|
||||
pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
|
||||
{
|
||||
struct pinctrl_gpio_range *range = NULL;
|
||||
|
||||
/* Loop over the ranges */
|
||||
mutex_lock(&pctldev->gpio_ranges_lock);
|
||||
list_for_each_entry(range, &pctldev->gpio_ranges, node) {
|
||||
/* Check if we're in the valid range */
|
||||
if (gpio >= range->base &&
|
||||
gpio < range->base + range->npins) {
|
||||
mutex_unlock(&pctldev->gpio_ranges_lock);
|
||||
return range;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&pctldev->gpio_ranges_lock);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* pinctrl_get_device_gpio_range() - find device for GPIO range
|
||||
* @gpio: the pin to locate the pin controller for
|
||||
* @outdev: the pin control device if found
|
||||
* @outrange: the GPIO range if found
|
||||
*
|
||||
* Find the pin controller handling a certain GPIO pin from the pinspace of
|
||||
* the GPIO subsystem, return the device and the matching GPIO range. Returns
|
||||
* negative if the GPIO range could not be found in any device.
|
||||
*/
|
||||
int pinctrl_get_device_gpio_range(unsigned gpio,
|
||||
struct pinctrl_dev **outdev,
|
||||
struct pinctrl_gpio_range **outrange)
|
||||
{
|
||||
struct pinctrl_dev *pctldev = NULL;
|
||||
|
||||
/* Loop over the pin controllers */
|
||||
mutex_lock(&pinctrldev_list_mutex);
|
||||
list_for_each_entry(pctldev, &pinctrldev_list, node) {
|
||||
struct pinctrl_gpio_range *range;
|
||||
|
||||
range = pinctrl_match_gpio_range(pctldev, gpio);
|
||||
if (range != NULL) {
|
||||
*outdev = pctldev;
|
||||
*outrange = range;
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/**
|
||||
* pinctrl_add_gpio_range() - register a GPIO range for a controller
|
||||
* @pctldev: pin controller device to add the range to
|
||||
* @range: the GPIO range to add
|
||||
*
|
||||
* This adds a range of GPIOs to be handled by a certain pin controller. Call
|
||||
* this to register handled ranges after registering your pin controller.
|
||||
*/
|
||||
void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range)
|
||||
{
|
||||
mutex_lock(&pctldev->gpio_ranges_lock);
|
||||
list_add(&range->node, &pctldev->gpio_ranges);
|
||||
mutex_unlock(&pctldev->gpio_ranges_lock);
|
||||
}
|
||||
|
||||
/**
|
||||
* pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
|
||||
* @pctldev: pin controller device to remove the range from
|
||||
* @range: the GPIO range to remove
|
||||
*/
|
||||
void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range)
|
||||
{
|
||||
mutex_lock(&pctldev->gpio_ranges_lock);
|
||||
list_del(&range->node);
|
||||
mutex_unlock(&pctldev->gpio_ranges_lock);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
static int pinctrl_pins_show(struct seq_file *s, void *what)
|
||||
{
|
||||
struct pinctrl_dev *pctldev = s->private;
|
||||
const struct pinctrl_ops *ops = pctldev->desc->pctlops;
|
||||
unsigned pin;
|
||||
|
||||
seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
|
||||
seq_printf(s, "max pin number: %d\n", pctldev->desc->maxpin);
|
||||
|
||||
/* The highest pin number need to be included in the loop, thus <= */
|
||||
for (pin = 0; pin <= pctldev->desc->maxpin; pin++) {
|
||||
struct pin_desc *desc;
|
||||
|
||||
desc = pin_desc_get(pctldev, pin);
|
||||
/* Pin space may be sparse */
|
||||
if (desc == NULL)
|
||||
continue;
|
||||
|
||||
seq_printf(s, "pin %d (%s) ", pin,
|
||||
desc->name ? desc->name : "unnamed");
|
||||
|
||||
/* Driver-specific info per pin */
|
||||
if (ops->pin_dbg_show)
|
||||
ops->pin_dbg_show(pctldev, s, pin);
|
||||
|
||||
seq_puts(s, "\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pinctrl_groups_show(struct seq_file *s, void *what)
|
||||
{
|
||||
struct pinctrl_dev *pctldev = s->private;
|
||||
const struct pinctrl_ops *ops = pctldev->desc->pctlops;
|
||||
unsigned selector = 0;
|
||||
|
||||
/* No grouping */
|
||||
if (!ops)
|
||||
return 0;
|
||||
|
||||
seq_puts(s, "registered pin groups:\n");
|
||||
while (ops->list_groups(pctldev, selector) >= 0) {
|
||||
const unsigned *pins;
|
||||
unsigned num_pins;
|
||||
const char *gname = ops->get_group_name(pctldev, selector);
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
ret = ops->get_group_pins(pctldev, selector,
|
||||
&pins, &num_pins);
|
||||
if (ret)
|
||||
seq_printf(s, "%s [ERROR GETTING PINS]\n",
|
||||
gname);
|
||||
else {
|
||||
seq_printf(s, "group: %s, pins = [ ", gname);
|
||||
for (i = 0; i < num_pins; i++)
|
||||
seq_printf(s, "%d ", pins[i]);
|
||||
seq_puts(s, "]\n");
|
||||
}
|
||||
selector++;
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
|
||||
{
|
||||
struct pinctrl_dev *pctldev = s->private;
|
||||
struct pinctrl_gpio_range *range = NULL;
|
||||
|
||||
seq_puts(s, "GPIO ranges handled:\n");
|
||||
|
||||
/* Loop over the ranges */
|
||||
mutex_lock(&pctldev->gpio_ranges_lock);
|
||||
list_for_each_entry(range, &pctldev->gpio_ranges, node) {
|
||||
seq_printf(s, "%u: %s [%u - %u]\n", range->id, range->name,
|
||||
range->base, (range->base + range->npins - 1));
|
||||
}
|
||||
mutex_unlock(&pctldev->gpio_ranges_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pinctrl_devices_show(struct seq_file *s, void *what)
|
||||
{
|
||||
struct pinctrl_dev *pctldev;
|
||||
|
||||
seq_puts(s, "name [pinmux]\n");
|
||||
mutex_lock(&pinctrldev_list_mutex);
|
||||
list_for_each_entry(pctldev, &pinctrldev_list, node) {
|
||||
seq_printf(s, "%s ", pctldev->desc->name);
|
||||
if (pctldev->desc->pmxops)
|
||||
seq_puts(s, "yes");
|
||||
else
|
||||
seq_puts(s, "no");
|
||||
seq_puts(s, "\n");
|
||||
}
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pinctrl_pins_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, pinctrl_pins_show, inode->i_private);
|
||||
}
|
||||
|
||||
static int pinctrl_groups_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, pinctrl_groups_show, inode->i_private);
|
||||
}
|
||||
|
||||
static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, pinctrl_gpioranges_show, inode->i_private);
|
||||
}
|
||||
|
||||
static int pinctrl_devices_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
return single_open(file, pinctrl_devices_show, NULL);
|
||||
}
|
||||
|
||||
static const struct file_operations pinctrl_pins_ops = {
|
||||
.open = pinctrl_pins_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static const struct file_operations pinctrl_groups_ops = {
|
||||
.open = pinctrl_groups_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static const struct file_operations pinctrl_gpioranges_ops = {
|
||||
.open = pinctrl_gpioranges_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static const struct file_operations pinctrl_devices_ops = {
|
||||
.open = pinctrl_devices_open,
|
||||
.read = seq_read,
|
||||
.llseek = seq_lseek,
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
static struct dentry *debugfs_root;
|
||||
|
||||
static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
static struct dentry *device_root;
|
||||
|
||||
device_root = debugfs_create_dir(dev_name(&pctldev->dev),
|
||||
debugfs_root);
|
||||
if (IS_ERR(device_root) || !device_root) {
|
||||
pr_warn("failed to create debugfs directory for %s\n",
|
||||
dev_name(&pctldev->dev));
|
||||
return;
|
||||
}
|
||||
debugfs_create_file("pins", S_IFREG | S_IRUGO,
|
||||
device_root, pctldev, &pinctrl_pins_ops);
|
||||
debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
|
||||
device_root, pctldev, &pinctrl_groups_ops);
|
||||
debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
|
||||
device_root, pctldev, &pinctrl_gpioranges_ops);
|
||||
pinmux_init_device_debugfs(device_root, pctldev);
|
||||
}
|
||||
|
||||
static void pinctrl_init_debugfs(void)
|
||||
{
|
||||
debugfs_root = debugfs_create_dir("pinctrl", NULL);
|
||||
if (IS_ERR(debugfs_root) || !debugfs_root) {
|
||||
pr_warn("failed to create debugfs directory\n");
|
||||
debugfs_root = NULL;
|
||||
return;
|
||||
}
|
||||
|
||||
debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
|
||||
debugfs_root, NULL, &pinctrl_devices_ops);
|
||||
pinmux_init_debugfs(debugfs_root);
|
||||
}
|
||||
|
||||
#else /* CONFIG_DEBUG_FS */
|
||||
|
||||
static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
}
|
||||
|
||||
static void pinctrl_init_debugfs(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* pinctrl_register() - register a pin controller device
|
||||
* @pctldesc: descriptor for this pin controller
|
||||
* @dev: parent device for this pin controller
|
||||
* @driver_data: private pin controller data for this pin controller
|
||||
*/
|
||||
struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
|
||||
struct device *dev, void *driver_data)
|
||||
{
|
||||
static atomic_t pinmux_no = ATOMIC_INIT(0);
|
||||
struct pinctrl_dev *pctldev;
|
||||
int ret;
|
||||
|
||||
if (pctldesc == NULL)
|
||||
return NULL;
|
||||
if (pctldesc->name == NULL)
|
||||
return NULL;
|
||||
|
||||
/* If we're implementing pinmuxing, check the ops for sanity */
|
||||
if (pctldesc->pmxops) {
|
||||
ret = pinmux_check_ops(pctldesc->pmxops);
|
||||
if (ret) {
|
||||
pr_err("%s pinmux ops lacks necessary functions\n",
|
||||
pctldesc->name);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
pctldev = kzalloc(sizeof(struct pinctrl_dev), GFP_KERNEL);
|
||||
if (pctldev == NULL)
|
||||
return NULL;
|
||||
|
||||
/* Initialize pin control device struct */
|
||||
pctldev->owner = pctldesc->owner;
|
||||
pctldev->desc = pctldesc;
|
||||
pctldev->driver_data = driver_data;
|
||||
INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
|
||||
spin_lock_init(&pctldev->pin_desc_tree_lock);
|
||||
INIT_LIST_HEAD(&pctldev->gpio_ranges);
|
||||
mutex_init(&pctldev->gpio_ranges_lock);
|
||||
|
||||
/* Register device */
|
||||
pctldev->dev.parent = dev;
|
||||
dev_set_name(&pctldev->dev, "pinctrl.%d",
|
||||
atomic_inc_return(&pinmux_no) - 1);
|
||||
pctldev->dev.release = pinctrl_dev_release;
|
||||
ret = device_register(&pctldev->dev);
|
||||
if (ret != 0) {
|
||||
pr_err("error in device registration\n");
|
||||
goto out_reg_dev_err;
|
||||
}
|
||||
dev_set_drvdata(&pctldev->dev, pctldev);
|
||||
|
||||
/* Register all the pins */
|
||||
pr_debug("try to register %d pins on %s...\n",
|
||||
pctldesc->npins, pctldesc->name);
|
||||
ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
|
||||
if (ret) {
|
||||
pr_err("error during pin registration\n");
|
||||
pinctrl_free_pindescs(pctldev, pctldesc->pins,
|
||||
pctldesc->npins);
|
||||
goto out_reg_pins_err;
|
||||
}
|
||||
|
||||
pinctrl_init_device_debugfs(pctldev);
|
||||
mutex_lock(&pinctrldev_list_mutex);
|
||||
list_add(&pctldev->node, &pinctrldev_list);
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
pinmux_hog_maps(pctldev);
|
||||
return pctldev;
|
||||
|
||||
out_reg_pins_err:
|
||||
device_del(&pctldev->dev);
|
||||
out_reg_dev_err:
|
||||
put_device(&pctldev->dev);
|
||||
return NULL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_register);
|
||||
|
||||
/**
|
||||
* pinctrl_unregister() - unregister pinmux
|
||||
* @pctldev: pin controller to unregister
|
||||
*
|
||||
* Called by pinmux drivers to unregister a pinmux.
|
||||
*/
|
||||
void pinctrl_unregister(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
if (pctldev == NULL)
|
||||
return;
|
||||
|
||||
pinmux_unhog_maps(pctldev);
|
||||
/* TODO: check that no pinmuxes are still active? */
|
||||
mutex_lock(&pinctrldev_list_mutex);
|
||||
list_del(&pctldev->node);
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
/* Destroy descriptor tree */
|
||||
pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
|
||||
pctldev->desc->npins);
|
||||
device_unregister(&pctldev->dev);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_unregister);
|
||||
|
||||
static int __init pinctrl_init(void)
|
||||
{
|
||||
pr_info("initialized pinctrl subsystem\n");
|
||||
pinctrl_init_debugfs();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* init early since many drivers really need to initialized pinmux early */
|
||||
core_initcall(pinctrl_init);
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* Core private header for the pin control subsystem
|
||||
*
|
||||
* Copyright (C) 2011 ST-Ericsson SA
|
||||
* Written on behalf of Linaro for ST-Ericsson
|
||||
*
|
||||
* Author: Linus Walleij <linus.walleij@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
/**
|
||||
* struct pinctrl_dev - pin control class device
|
||||
* @node: node to include this pin controller in the global pin controller list
|
||||
* @desc: the pin controller descriptor supplied when initializing this pin
|
||||
* controller
|
||||
* @pin_desc_tree: each pin descriptor for this pin controller is stored in
|
||||
* this radix tree
|
||||
* @pin_desc_tree_lock: lock for the descriptor tree
|
||||
* @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
|
||||
* ranges are added to this list at runtime
|
||||
* @gpio_ranges_lock: lock for the GPIO ranges list
|
||||
* @dev: the device entry for this pin controller
|
||||
* @owner: module providing the pin controller, used for refcounting
|
||||
* @driver_data: driver data for drivers registering to the pin controller
|
||||
* subsystem
|
||||
* @pinmux_hogs_lock: lock for the pinmux hog list
|
||||
* @pinmux_hogs: list of pinmux maps hogged by this device
|
||||
*/
|
||||
struct pinctrl_dev {
|
||||
struct list_head node;
|
||||
struct pinctrl_desc *desc;
|
||||
struct radix_tree_root pin_desc_tree;
|
||||
spinlock_t pin_desc_tree_lock;
|
||||
struct list_head gpio_ranges;
|
||||
struct mutex gpio_ranges_lock;
|
||||
struct device dev;
|
||||
struct module *owner;
|
||||
void *driver_data;
|
||||
#ifdef CONFIG_PINMUX
|
||||
struct mutex pinmux_hogs_lock;
|
||||
struct list_head pinmux_hogs;
|
||||
#endif
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pin_desc - pin descriptor for each physical pin in the arch
|
||||
* @pctldev: corresponding pin control device
|
||||
* @name: a name for the pin, e.g. the name of the pin/pad/finger on a
|
||||
* datasheet or such
|
||||
* @lock: a lock to protect the descriptor structure
|
||||
* @mux_requested: whether the pin is already requested by pinmux or not
|
||||
* @mux_function: a named muxing function for the pin that will be passed to
|
||||
* subdrivers and shown in debugfs etc
|
||||
*/
|
||||
struct pin_desc {
|
||||
struct pinctrl_dev *pctldev;
|
||||
const char *name;
|
||||
spinlock_t lock;
|
||||
/* These fields only added when supporting pinmux drivers */
|
||||
#ifdef CONFIG_PINMUX
|
||||
const char *mux_function;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct pinctrl_dev *get_pinctrl_dev_from_dev(struct device *dev,
|
||||
const char *dev_name);
|
||||
struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, int pin);
|
||||
int pinctrl_get_device_gpio_range(unsigned gpio,
|
||||
struct pinctrl_dev **outdev,
|
||||
struct pinctrl_gpio_range **outrange);
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* Internal interface between the core pin control system and the
|
||||
* pinmux portions
|
||||
*
|
||||
* Copyright (C) 2011 ST-Ericsson SA
|
||||
* Written on behalf of Linaro for ST-Ericsson
|
||||
* Based on bits of regulator core, gpio core and clk core
|
||||
*
|
||||
* Author: Linus Walleij <linus.walleij@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
#ifdef CONFIG_PINMUX
|
||||
|
||||
int pinmux_check_ops(const struct pinmux_ops *ops);
|
||||
void pinmux_init_device_debugfs(struct dentry *devroot,
|
||||
struct pinctrl_dev *pctldev);
|
||||
void pinmux_init_debugfs(struct dentry *subsys_root);
|
||||
int pinmux_hog_maps(struct pinctrl_dev *pctldev);
|
||||
void pinmux_unhog_maps(struct pinctrl_dev *pctldev);
|
||||
|
||||
#else
|
||||
|
||||
static inline int pinmux_check_ops(const struct pinmux_ops *ops)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void pinmux_init_device_debugfs(struct dentry *devroot,
|
||||
struct pinctrl_dev *pctldev)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void pinmux_init_debugfs(struct dentry *subsys_root)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int pinmux_hog_maps(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void pinmux_unhog_maps(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,107 @@
|
|||
/*
|
||||
* Machine interface for the pinctrl subsystem.
|
||||
*
|
||||
* Copyright (C) 2011 ST-Ericsson SA
|
||||
* Written on behalf of Linaro for ST-Ericsson
|
||||
* Based on bits of regulator core, gpio core and clk core
|
||||
*
|
||||
* Author: Linus Walleij <linus.walleij@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
#ifndef __LINUX_PINMUX_MACHINE_H
|
||||
#define __LINUX_PINMUX_MACHINE_H
|
||||
|
||||
/**
|
||||
* struct pinmux_map - boards/machines shall provide this map for devices
|
||||
* @name: the name of this specific map entry for the particular machine.
|
||||
* This is the second parameter passed to pinmux_get() when you want
|
||||
* to have several mappings to the same device
|
||||
* @ctrl_dev: the pin control device to be used by this mapping, may be NULL
|
||||
* if you provide .ctrl_dev_name instead (this is more common)
|
||||
* @ctrl_dev_name: the name of the device controlling this specific mapping,
|
||||
* the name must be the same as in your struct device*, may be NULL if
|
||||
* you provide .ctrl_dev instead
|
||||
* @function: a function in the driver to use for this mapping, the driver
|
||||
* will lookup the function referenced by this ID on the specified
|
||||
* pin control device
|
||||
* @group: sometimes a function can map to different pin groups, so this
|
||||
* selects a certain specific pin group to activate for the function, if
|
||||
* left as NULL, the first applicable group will be used
|
||||
* @dev: the device using this specific mapping, may be NULL if you provide
|
||||
* .dev_name instead (this is more common)
|
||||
* @dev_name: the name of the device using this specific mapping, the name
|
||||
* must be the same as in your struct device*, may be NULL if you
|
||||
* provide .dev instead
|
||||
* @hog_on_boot: if this is set to true, the pin control subsystem will itself
|
||||
* hog the mappings as the pinmux device drivers are attached, so this is
|
||||
* typically used with system maps (mux mappings without an assigned
|
||||
* device) that you want to get hogged and enabled by default as soon as
|
||||
* a pinmux device supporting it is registered. These maps will not be
|
||||
* disabled and put until the system shuts down.
|
||||
*/
|
||||
struct pinmux_map {
|
||||
const char *name;
|
||||
struct device *ctrl_dev;
|
||||
const char *ctrl_dev_name;
|
||||
const char *function;
|
||||
const char *group;
|
||||
struct device *dev;
|
||||
const char *dev_name;
|
||||
const bool hog_on_boot;
|
||||
};
|
||||
|
||||
/*
|
||||
* Convenience macro to set a simple map from a certain pin controller and a
|
||||
* certain function to a named device
|
||||
*/
|
||||
#define PINMUX_MAP(a, b, c, d) \
|
||||
{ .name = a, .ctrl_dev_name = b, .function = c, .dev_name = d }
|
||||
|
||||
/*
|
||||
* Convenience macro to map a system function onto a certain pinctrl device.
|
||||
* System functions are not assigned to a particular device.
|
||||
*/
|
||||
#define PINMUX_MAP_SYS(a, b, c) \
|
||||
{ .name = a, .ctrl_dev_name = b, .function = c }
|
||||
|
||||
/*
|
||||
* Convenience macro to map a function onto the primary device pinctrl device
|
||||
* this is especially helpful on systems that have only one pin controller
|
||||
* or need to set up a lot of mappings on the primary controller.
|
||||
*/
|
||||
#define PINMUX_MAP_PRIMARY(a, b, c) \
|
||||
{ .name = a, .ctrl_dev_name = "pinctrl.0", .function = b, \
|
||||
.dev_name = c }
|
||||
|
||||
/*
|
||||
* Convenience macro to map a system function onto the primary pinctrl device.
|
||||
* System functions are not assigned to a particular device.
|
||||
*/
|
||||
#define PINMUX_MAP_PRIMARY_SYS(a, b) \
|
||||
{ .name = a, .ctrl_dev_name = "pinctrl.0", .function = b }
|
||||
|
||||
/*
|
||||
* Convenience macro to map a system function onto the primary pinctrl device,
|
||||
* to be hogged by the pinmux core until the system shuts down.
|
||||
*/
|
||||
#define PINMUX_MAP_PRIMARY_SYS_HOG(a, b) \
|
||||
{ .name = a, .ctrl_dev_name = "pinctrl.0", .function = b, \
|
||||
.hog_on_boot = true }
|
||||
|
||||
|
||||
#ifdef CONFIG_PINMUX
|
||||
|
||||
extern int pinmux_register_mappings(struct pinmux_map const *map,
|
||||
unsigned num_maps);
|
||||
|
||||
#else
|
||||
|
||||
static inline int pinmux_register_mappings(struct pinmux_map const *map,
|
||||
unsigned num_maps)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_PINMUX */
|
||||
#endif
|
||||
|
|
@ -0,0 +1,133 @@
|
|||
/*
|
||||
* Interface the pinctrl subsystem
|
||||
*
|
||||
* Copyright (C) 2011 ST-Ericsson SA
|
||||
* Written on behalf of Linaro for ST-Ericsson
|
||||
* This interface is used in the core to keep track of pins.
|
||||
*
|
||||
* Author: Linus Walleij <linus.walleij@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
#ifndef __LINUX_PINCTRL_PINCTRL_H
|
||||
#define __LINUX_PINCTRL_PINCTRL_H
|
||||
|
||||
#ifdef CONFIG_PINCTRL
|
||||
|
||||
#include <linux/radix-tree.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
||||
struct pinctrl_dev;
|
||||
struct pinmux_ops;
|
||||
struct gpio_chip;
|
||||
|
||||
/**
|
||||
* struct pinctrl_pin_desc - boards/machines provide information on their
|
||||
* pins, pads or other muxable units in this struct
|
||||
* @number: unique pin number from the global pin number space
|
||||
* @name: a name for this pin
|
||||
*/
|
||||
struct pinctrl_pin_desc {
|
||||
unsigned number;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
/* Convenience macro to define a single named or anonymous pin descriptor */
|
||||
#define PINCTRL_PIN(a, b) { .number = a, .name = b }
|
||||
#define PINCTRL_PIN_ANON(a) { .number = a }
|
||||
|
||||
/**
|
||||
* struct pinctrl_gpio_range - each pin controller can provide subranges of
|
||||
* the GPIO number space to be handled by the controller
|
||||
* @node: list node for internal use
|
||||
* @name: a name for the chip in this range
|
||||
* @id: an ID number for the chip in this range
|
||||
* @base: base offset of the GPIO range
|
||||
* @npins: number of pins in the GPIO range, including the base number
|
||||
* @gc: an optional pointer to a gpio_chip
|
||||
*/
|
||||
struct pinctrl_gpio_range {
|
||||
struct list_head node;
|
||||
const char *name;
|
||||
unsigned int id;
|
||||
unsigned int base;
|
||||
unsigned int npins;
|
||||
struct gpio_chip *gc;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pinctrl_ops - global pin control operations, to be implemented by
|
||||
* pin controller drivers.
|
||||
* @list_groups: list the number of selectable named groups available
|
||||
* in this pinmux driver, the core will begin on 0 and call this
|
||||
* repeatedly as long as it returns >= 0 to enumerate the groups
|
||||
* @get_group_name: return the group name of the pin group
|
||||
* @get_group_pins: return an array of pins corresponding to a certain
|
||||
* group selector @pins, and the size of the array in @num_pins
|
||||
* @pin_dbg_show: optional debugfs display hook that will provide per-device
|
||||
* info for a certain pin in debugfs
|
||||
*/
|
||||
struct pinctrl_ops {
|
||||
int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector);
|
||||
const char *(*get_group_name) (struct pinctrl_dev *pctldev,
|
||||
unsigned selector);
|
||||
int (*get_group_pins) (struct pinctrl_dev *pctldev,
|
||||
unsigned selector,
|
||||
const unsigned **pins,
|
||||
unsigned *num_pins);
|
||||
void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
|
||||
unsigned offset);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct pinctrl_desc - pin controller descriptor, register this to pin
|
||||
* control subsystem
|
||||
* @name: name for the pin controller
|
||||
* @pins: an array of pin descriptors describing all the pins handled by
|
||||
* this pin controller
|
||||
* @npins: number of descriptors in the array, usually just ARRAY_SIZE()
|
||||
* of the pins field above
|
||||
* @maxpin: since pin spaces may be sparse, there can he "holes" in the
|
||||
* pin range, this attribute gives the maximum pin number in the
|
||||
* total range. This should not be lower than npins for example,
|
||||
* but may be equal to npins if you have no holes in the pin range.
|
||||
* @pctlops: pin control operation vtable, to support global concepts like
|
||||
* grouping of pins, this is optional.
|
||||
* @pmxops: pinmux operation vtable, if you support pinmuxing in your driver
|
||||
* @owner: module providing the pin controller, used for refcounting
|
||||
*/
|
||||
struct pinctrl_desc {
|
||||
const char *name;
|
||||
struct pinctrl_pin_desc const *pins;
|
||||
unsigned int npins;
|
||||
unsigned int maxpin;
|
||||
struct pinctrl_ops *pctlops;
|
||||
struct pinmux_ops *pmxops;
|
||||
struct module *owner;
|
||||
};
|
||||
|
||||
/* External interface to pin controller */
|
||||
extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
|
||||
struct device *dev, void *driver_data);
|
||||
extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
|
||||
extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
|
||||
extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range);
|
||||
extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range);
|
||||
extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
|
||||
extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
|
||||
#else
|
||||
|
||||
|
||||
/* Sufficiently stupid default function when pinctrl is not in use */
|
||||
static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
|
||||
{
|
||||
return pin >= 0;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_PINCTRL */
|
||||
|
||||
#endif /* __LINUX_PINCTRL_PINCTRL_H */
|
||||
|
|
@ -0,0 +1,117 @@
|
|||
/*
|
||||
* Interface the pinmux subsystem
|
||||
*
|
||||
* Copyright (C) 2011 ST-Ericsson SA
|
||||
* Written on behalf of Linaro for ST-Ericsson
|
||||
* Based on bits of regulator core, gpio core and clk core
|
||||
*
|
||||
* Author: Linus Walleij <linus.walleij@linaro.org>
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
#ifndef __LINUX_PINCTRL_PINMUX_H
|
||||
#define __LINUX_PINCTRL_PINMUX_H
|
||||
|
||||
#include <linux/list.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include "pinctrl.h"
|
||||
|
||||
/* This struct is private to the core and should be regarded as a cookie */
|
||||
struct pinmux;
|
||||
|
||||
#ifdef CONFIG_PINMUX
|
||||
|
||||
struct pinctrl_dev;
|
||||
|
||||
/**
|
||||
* struct pinmux_ops - pinmux operations, to be implemented by pin controller
|
||||
* drivers that support pinmuxing
|
||||
* @request: called by the core to see if a certain pin can be made available
|
||||
* available for muxing. This is called by the core to acquire the pins
|
||||
* before selecting any actual mux setting across a function. The driver
|
||||
* is allowed to answer "no" by returning a negative error code
|
||||
* @free: the reverse function of the request() callback, frees a pin after
|
||||
* being requested
|
||||
* @list_functions: list the number of selectable named functions available
|
||||
* in this pinmux driver, the core will begin on 0 and call this
|
||||
* repeatedly as long as it returns >= 0 to enumerate mux settings
|
||||
* @get_function_name: return the function name of the muxing selector,
|
||||
* called by the core to figure out which mux setting it shall map a
|
||||
* certain device to
|
||||
* @get_function_groups: return an array of groups names (in turn
|
||||
* referencing pins) connected to a certain function selector. The group
|
||||
* name can be used with the generic @pinctrl_ops to retrieve the
|
||||
* actual pins affected. The applicable groups will be returned in
|
||||
* @groups and the number of groups in @num_groups
|
||||
* @enable: enable a certain muxing function with a certain pin group. The
|
||||
* driver does not need to figure out whether enabling this function
|
||||
* conflicts some other use of the pins in that group, such collisions
|
||||
* are handled by the pinmux subsystem. The @func_selector selects a
|
||||
* certain function whereas @group_selector selects a certain set of pins
|
||||
* to be used. On simple controllers the latter argument may be ignored
|
||||
* @disable: disable a certain muxing selector with a certain pin group
|
||||
* @gpio_request_enable: requests and enables GPIO on a certain pin.
|
||||
* Implement this only if you can mux every pin individually as GPIO. The
|
||||
* affected GPIO range is passed along with an offset into that
|
||||
* specific GPIO range - function selectors and pin groups are orthogonal
|
||||
* to this, the core will however make sure the pins do not collide
|
||||
*/
|
||||
struct pinmux_ops {
|
||||
int (*request) (struct pinctrl_dev *pctldev, unsigned offset);
|
||||
int (*free) (struct pinctrl_dev *pctldev, unsigned offset);
|
||||
int (*list_functions) (struct pinctrl_dev *pctldev, unsigned selector);
|
||||
const char *(*get_function_name) (struct pinctrl_dev *pctldev,
|
||||
unsigned selector);
|
||||
int (*get_function_groups) (struct pinctrl_dev *pctldev,
|
||||
unsigned selector,
|
||||
const char * const **groups,
|
||||
unsigned * const num_groups);
|
||||
int (*enable) (struct pinctrl_dev *pctldev, unsigned func_selector,
|
||||
unsigned group_selector);
|
||||
void (*disable) (struct pinctrl_dev *pctldev, unsigned func_selector,
|
||||
unsigned group_selector);
|
||||
int (*gpio_request_enable) (struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset);
|
||||
};
|
||||
|
||||
/* External interface to pinmux */
|
||||
extern int pinmux_request_gpio(unsigned gpio);
|
||||
extern void pinmux_free_gpio(unsigned gpio);
|
||||
extern struct pinmux * __must_check pinmux_get(struct device *dev, const char *name);
|
||||
extern void pinmux_put(struct pinmux *pmx);
|
||||
extern int pinmux_enable(struct pinmux *pmx);
|
||||
extern void pinmux_disable(struct pinmux *pmx);
|
||||
|
||||
#else /* !CONFIG_PINMUX */
|
||||
|
||||
static inline int pinmux_request_gpio(unsigned gpio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void pinmux_free_gpio(unsigned gpio)
|
||||
{
|
||||
}
|
||||
|
||||
static inline struct pinmux * __must_check pinmux_get(struct device *dev, const char *name)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void pinmux_put(struct pinmux *pmx)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int pinmux_enable(struct pinmux *pmx)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void pinmux_disable(struct pinmux *pmx)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PINMUX */
|
||||
|
||||
#endif /* __LINUX_PINCTRL_PINMUX_H */
|
||||
Loading…
Reference in New Issue