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i2c: designware-pci: no need to provide clk_khz 

The clk_khz field makes sense only if SS counters are not provided. Since we
provide them for Haswell and Baytrail explicitly we may omit the clk_khz
parameter.

Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Andy Shevchenko 2015-01-23 13:54:04 +02:00 committed by Wolfram Sang
parent bd1179fd56
commit c99d49a964
1 changed files with 0 additions and 2 deletions
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2
drivers/i2c/busses/i2c-designware-pcidrv.c
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@ -145,7 +145,6 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 32, .tx_fifo_depth = 32,
.rx_fifo_depth = 32, .rx_fifo_depth = 32,
.clk_khz = 100000,
.functionality = I2C_FUNC_10BIT_ADDR, .functionality = I2C_FUNC_10BIT_ADDR,
.scl_sda_cfg = &byt_config, .scl_sda_cfg = &byt_config,
}, },
@ -154,7 +153,6 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
.tx_fifo_depth = 32, .tx_fifo_depth = 32,
.rx_fifo_depth = 32, .rx_fifo_depth = 32,
.clk_khz = 100000,
.functionality = I2C_FUNC_10BIT_ADDR, .functionality = I2C_FUNC_10BIT_ADDR,
.scl_sda_cfg = &hsw_config, .scl_sda_cfg = &hsw_config,
}, },