ARM: l2c: prima2: remove cache size override
The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -11,21 +11,6 @@
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#include <linux/of.h>
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#include <asm/hardware/cache-l2x0.h>
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struct l2x0_aux {
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u32 val;
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u32 mask;
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};
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static const struct l2x0_aux prima2_l2x0_aux __initconst = {
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.val = L2C_AUX_CTRL_WAY_SIZE(2),
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.mask = 0,
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};
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static const struct l2x0_aux marco_l2x0_aux __initconst = {
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.val = L2C_AUX_CTRL_WAY_SIZE(2) | L310_AUX_CTRL_ASSOCIATIVITY_16,
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.mask = L2X0_AUX_CTRL_MASK,
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};
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static const struct of_device_id sirf_l2x0_ids[] __initconst = {
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{ .compatible = "sirf,prima2-pl310-cache", .data = &prima2_l2x0_aux, },
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{ .compatible = "sirf,marco-pl310-cache", .data = &marco_l2x0_aux, },
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@ -35,13 +20,10 @@ static const struct of_device_id sirf_l2x0_ids[] __initconst = {
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static int __init sirfsoc_l2x0_init(void)
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{
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struct device_node *np;
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const struct l2x0_aux *aux;
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np = of_find_matching_node(NULL, sirf_l2x0_ids);
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if (np) {
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aux = of_match_node(sirf_l2x0_ids, np)->data;
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return l2x0_of_init(aux->val, aux->mask);
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}
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if (np)
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return l2x0_of_init(0, ~0);
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return 0;
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}
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