ath9k: Disable AR_INTR_SYNC_HOST1_FATAL for QCA953x
Along with AR9340 and AR955x, this is also needed for the QCA953x SoC. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -882,7 +882,7 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
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AR_IMR_RXORN |
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AR_IMR_BCNMISC;
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if (AR_SREV_9340(ah) || AR_SREV_9550(ah))
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if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah))
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sync_default &= ~AR_INTR_SYNC_HOST1_FATAL;
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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@ -827,7 +827,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
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return;
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}
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if (AR_SREV_9340(ah) || AR_SREV_9550(ah))
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if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah))
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sync_default &= ~AR_INTR_SYNC_HOST1_FATAL;
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async_mask = AR_INTR_MAC_IRQ;
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