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Merge branch 'clk-of-init-v2_for-3.13' of https://github.com/shesselba/linux-dove into next/cleanup 

From Sebastian Hasselbarth:

This is a patch set based on an RFC [1][2] sent earlier to provide
a common arch/arm init for DT clock providers. Currently, the call to
of_clk_init(NULL) to initialize DT clock providers is spread among several
mach-dirs. Since most machs require DT clocks initialized before timers,
no initcall can be used.

By adding of_clk_init(NULL) to arch/arm time_init(), we can remove all
mach-specific .init_time hooks that basically called of_clk_init and
clocksource_of_init.

In contrast to the RFC version, of_clk_init(NULL) is now only called if
no custom .init_time callback is set. This allows some machs to still
call clock init themselves, as not all can be converted now. Therefore,
this patch sets drops conversion of mach-mvebu and mach-zynq. New machs
that were introduced with v3.12-rc1 are also converted, except mach-u300
that requires clocks before irqs.

* 'clk-of-init-v2_for-3.13' of https://github.com/shesselba/linux-dove: (29 commits)
  ARM: vt8500: remove custom .init_time hook
  ARM: vexpress: remove custom .init_time hook
  ARM: tegra: remove custom .init_time hook
  ARM: sunxi: remove custom .init_time hook
  ARM: sti: remove custom .init_time hook
  ARM: socfpga: remove custom .init_time hook
  ARM: rockchip: remove custom .init_time hook
  ARM: prima2: remove custom .init_time hook
  ARM: nspire: remove custom .init_time hook
  ARM: nomadik: remove custom .init_time hook
  ARM: mxs: remove custom .init_time hook
  ARM: kirkwood: remove custom .init_time hook
  ARM: imx: remove custom .init_time hook
  ARM: highbank: remove custom .init_time hook
  ARM: exynos: remove custom .init_time hook
  ARM: dove: remove custom .init_time hook
  ARM: bcm2835: remove custom .init_time hook
  ARM: bcm: provide common arch init for DT clocks
  ARM: call of_clk_init from default time_init handler
  ARM: vt8500: prepare for arch-wide .init_time callback
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-10-07 09:47:31 -07:00
parent ec01791d0f 64cc69abbb
commit c884357ec6
44 changed files with 227 additions and 468 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
arch/arm/kernel/time.c
View File

@ -11,25 +11,26 @@
* This file contains the ARM-specific time handling details:
* reading the RTC at bootup, etc...
*/
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/timex.h>
#include <linux/errno.h>
#include <linux/profile.h>
#include <linux/timer.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/profile.h>
#include <linux/sched.h>
#include <linux/sched_clock.h>
#include <linux/smp.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/timer.h>
#include <asm/thread_info.h>
#include <asm/stacktrace.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/stacktrace.h>
#include <asm/thread_info.h>
#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \
defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE)
@ -116,8 +117,12 @@ int __init register_persistent_clock(clock_access_fn read_boot,
void __init time_init(void)
{
if (machine_desc->init_time)
if (machine_desc->init_time) {
machine_desc->init_time();
else
} else {
#ifdef CONFIG_COMMON_CLK
of_clk_init(NULL);
#endif
clocksource_of_init();
}
}

1
arch/arm/mach-bcm/board_bcm281xx.c
View File

@ -68,7 +68,6 @@ static void __init board_init(void)
static const char * const bcm11351_dt_compat[] = { "brcm,bcm11351", NULL, };
DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
.init_time = clocksource_of_init,
.init_machine = board_init,
.restart = bcm_kona_restart,
.dt_compat = bcm11351_dt_compat,

2
arch/arm/mach-bcm2835/bcm2835.c
View File

@ -18,7 +18,6 @@
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/clk/bcm2835.h>
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -134,7 +133,6 @@ DT_MACHINE_START(BCM2835, "BCM2835")
.init_irq = bcm2835_init_irq,
.handle_irq = bcm2835_handle_irq,
.init_machine = bcm2835_init,
.init_time = clocksource_of_init,
.restart = bcm2835_restart,
.dt_compat = bcm2835_compat
MACHINE_END

11
arch/arm/mach-dove/board-dt.c
View File

@ -10,17 +10,13 @@
#include <linux/init.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/arch.h>
#include <mach/dove.h>
#include <mach/pm.h>
#include <plat/common.h>
#include <plat/irq.h>
#include "common.h"
/*
@ -45,12 +41,6 @@ static void __init dove_legacy_clk_init(void)
of_clk_get_from_provider(&clkspec));
}
static void __init dove_dt_time_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
}
static void __init dove_dt_init_early(void)
{
mvebu_mbus_init("marvell,dove-mbus",
@ -84,7 +74,6 @@ static const char * const dove_dt_board_compat[] = {
DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
.map_io = dove_map_io,
.init_early = dove_dt_init_early,
.init_time = dove_dt_time_init,
.init_machine = dove_dt_init,
.restart = dove_restart,
.dt_compat = dove_dt_board_compat,

8
arch/arm/mach-exynos/common.c
View File

@ -26,8 +26,6 @@
#include <linux/export.h>
#include <linux/irqdomain.h>
#include <linux/of_address.h>
#include <linux/clocksource.h>
#include <linux/clk-provider.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/irqchip/chained_irq.h>
@ -367,12 +365,6 @@ static void __init exynos5_map_io(void)
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
}
void __init exynos_init_time(void)
{
of_clk_init(NULL);
clocksource_of_init();
}
struct bus_type exynos_subsys = {
.name = "exynos-core",
.dev_name = "exynos-core",

1
arch/arm/mach-exynos/common.h
View File

@ -16,7 +16,6 @@
#include <linux/of.h>
void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
void exynos_init_time(void);
struct map_desc;
void exynos_init_io(void);

2
arch/arm/mach-exynos/mach-exynos4-dt.c
View File

@ -16,7 +16,6 @@
#include <linux/of_fdt.h>
#include <linux/serial_core.h>
#include <linux/memblock.h>
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
#include <plat/mfc.h>
@ -54,7 +53,6 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
.init_early = exynos_firmware_init,
.init_machine = exynos4_dt_machine_init,
.init_late = exynos_init_late,
.init_time = exynos_init_time,
.dt_compat = exynos4_dt_compat,
.restart = exynos4_restart,
.reserve = exynos4_reserve,

2
arch/arm/mach-exynos/mach-exynos5-dt.c
View File

@ -13,7 +13,6 @@
#include <linux/of_fdt.h>
#include <linux/memblock.h>
#include <linux/io.h>
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
#include <mach/regs-pmu.h>
@ -76,7 +75,6 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
.map_io = exynos_init_io,
.init_machine = exynos5_dt_machine_init,
.init_late = exynos_init_late,
.init_time = exynos_init_time,
.dt_compat = exynos5_dt_compat,
.restart = exynos5_restart,
.reserve = exynos5_reserve,

23
arch/arm/mach-highbank/highbank.c
View File

@ -24,7 +24,6 @@
#include <linux/of_platform.h>
#include <linux/of_address.h>
#include <linux/amba/bus.h>
#include <linux/clk-provider.h>
#include <asm/cacheflush.h>
#include <asm/cputype.h>
@ -83,20 +82,6 @@ static void __init highbank_init_irq(void)
}
}
static void __init highbank_timer_init(void)
{
struct device_node *np;
/* Map system registers */
np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
sregs_base = of_iomap(np, 0);
WARN_ON(!sregs_base);
of_clk_init(NULL);
clocksource_of_init();
}
static void highbank_power_off(void)
{
highbank_set_pwr_shutdown();
@ -155,6 +140,13 @@ static struct notifier_block highbank_platform_nb = {
static void __init highbank_init(void)
{
struct device_node *np;
/* Map system registers */
np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
sregs_base = of_iomap(np, 0);
WARN_ON(!sregs_base);
pm_power_off = highbank_power_off;
highbank_pm_init();
@ -176,7 +168,6 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
#endif
.smp = smp_ops(highbank_smp_ops),
.init_irq = highbank_init_irq,
.init_time = highbank_timer_init,
.init_machine = highbank_init,
.dt_compat = highbank_match,
.restart = highbank_restart,

29
arch/arm/mach-imx/clk-imx51-imx53.c
View File

@ -11,6 +11,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/err.h>
@ -131,8 +132,6 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
{
int i;
of_clk_init(NULL);
clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckil] = imx_obtain_fixed_clock("ckil", rate_ckil);
clk[osc] = imx_obtain_fixed_clock("osc", rate_osc);
@ -465,12 +464,16 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
return 0;
}
int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
unsigned long rate_ckih1, unsigned long rate_ckih2)
static void __init mx51_clocks_init_dt(struct device_node *np)
{
mx51_clocks_init(0, 0, 0, 0);
}
CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init_dt);
static void __init mx53_clocks_init(struct device_node *np)
{
int i;
unsigned long r;
struct device_node *np;
clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);
clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@ -529,12 +532,11 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
pr_err("i.MX53 clk %d: register failed with %ld\n",
i, PTR_ERR(clk[i]));
np = of_find_compatible_node(NULL, NULL, "fsl,imx53-ccm");
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
mx5_clocks_common_init(0, 0, 0, 0);
clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
@ -566,16 +568,5 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
r = clk_round_rate(clk[usboh3_per_gate], 54000000);
clk_set_rate(clk[usboh3_per_gate], r);
return 0;
}
int __init mx51_clocks_init_dt(void)
{
return mx51_clocks_init(0, 0, 0, 0);
}
int __init mx53_clocks_init_dt(void)
{
return mx53_clocks_init(0, 0, 0, 0);
}
CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);

4
arch/arm/mach-imx/common.h
View File

@ -63,13 +63,9 @@ extern int mx31_clocks_init(unsigned long fref);
extern int mx35_clocks_init(void);
extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
unsigned long ckih1, unsigned long ckih2);
extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
unsigned long ckih1, unsigned long ckih2);
extern int mx25_clocks_init_dt(void);
extern int mx27_clocks_init_dt(void);
extern int mx31_clocks_init_dt(void);
extern int mx51_clocks_init_dt(void);
extern int mx53_clocks_init_dt(void);
extern struct platform_device *mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
extern void mxc_set_cpu_type(unsigned int type);

6
arch/arm/mach-imx/imx51-dt.c
View File

@ -34,17 +34,11 @@ static const char *imx51_dt_board_compat[] __initdata = {
NULL
};
static void __init imx51_timer_init(void)
{
mx51_clocks_init_dt();
}
DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
.map_io = mx51_map_io,
.init_early = imx51_init_early,
.init_irq = mx51_init_irq,
.handle_irq = imx51_handle_irq,
.init_time = imx51_timer_init,
.init_machine = imx51_dt_init,
.init_late = imx51_init_late,
.dt_compat = imx51_dt_board_compat,

6
arch/arm/mach-imx/mach-imx53.c
View File

@ -36,17 +36,11 @@ static const char *imx53_dt_board_compat[] __initdata = {
NULL
};
static void __init imx53_timer_init(void)
{
mx53_clocks_init_dt();
}
DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
.map_io = mx53_map_io,
.init_early = imx53_init_early,
.init_irq = mx53_init_irq,
.handle_irq = imx53_handle_irq,
.init_time = imx53_timer_init,
.init_machine = imx53_dt_init,
.init_late = imx53_init_late,
.dt_compat = imx53_dt_board_compat,

14
arch/arm/mach-imx/mach-imx6q.c
View File

@ -11,9 +11,7 @@
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clocksource.h>
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/export.h>
@ -192,6 +190,9 @@ static void __init imx6q_1588_init(void)
static void __init imx6q_init_machine(void)
{
imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
imx6q_revision());
imx6q_enet_phy_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@ -293,14 +294,6 @@ static void __init imx6q_init_irq(void)
irqchip_init();
}
static void __init imx6q_timer_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
imx6q_revision());
}
static const char *imx6q_dt_compat[] __initdata = {
"fsl,imx6dl",
"fsl,imx6q",
@ -311,7 +304,6 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)")
.smp = smp_ops(imx_smp_ops),
.map_io = imx6q_map_io,
.init_irq = imx6q_init_irq,
.init_time = imx6q_timer_init,
.init_machine = imx6q_init_machine,
.init_late = imx6q_init_late,
.dt_compat = imx6q_dt_compat,

7
arch/arm/mach-imx/mach-imx6sl.c
View File

@ -7,7 +7,6 @@
*
*/
#include <linux/clk-provider.h>
#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_platform.h>
@ -31,11 +30,6 @@ static void __init imx6sl_init_irq(void)
irqchip_init();
}
static void __init imx6sl_timer_init(void)
{
of_clk_init(NULL);
}
static const char *imx6sl_dt_compat[] __initdata = {
"fsl,imx6sl",
NULL,
@ -44,7 +38,6 @@ static const char *imx6sl_dt_compat[] __initdata = {
DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
.map_io = debug_ll_io_init,
.init_irq = imx6sl_init_irq,
.init_time = imx6sl_timer_init,
.init_machine = imx6sl_init_machine,
.dt_compat = imx6sl_dt_compat,
.restart = mxc_restart,

9
arch/arm/mach-imx/mach-vf610.c
View File

@ -8,9 +8,7 @@
*/
#include <linux/of_platform.h>
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <linux/clk-provider.h>
#include <asm/mach/arch.h>
#include <asm/hardware/cache-l2x0.h>
@ -28,12 +26,6 @@ static void __init vf610_init_irq(void)
irqchip_init();
}
static void __init vf610_init_time(void)
{
of_clk_init(NULL);
clocksource_of_init();
}
static const char *vf610_dt_compat[] __initdata = {
"fsl,vf610",
NULL,
@ -41,7 +33,6 @@ static const char *vf610_dt_compat[] __initdata = {
DT_MACHINE_START(VYBRID_VF610, "Freescale Vybrid VF610 (Device Tree)")
.init_irq = vf610_init_irq,
.init_time = vf610_init_time,
.init_machine = vf610_init_machine,
.dt_compat = vf610_dt_compat,
.restart = mxc_restart,

8
arch/arm/mach-kirkwood/board-dt.c
View File

@ -15,7 +15,6 @@
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/dma-mapping.h>
#include <linux/irqchip.h>
#include <linux/kexec.h>
@ -66,12 +65,6 @@ static void __init kirkwood_legacy_clk_init(void)
clk_prepare_enable(clk);
}
static void __init kirkwood_dt_time_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
}
static void __init kirkwood_dt_init_early(void)
{
mvebu_mbus_init("marvell,kirkwood-mbus",
@ -122,7 +115,6 @@ DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
.map_io = kirkwood_map_io,
.init_early = kirkwood_dt_init_early,
.init_time = kirkwood_dt_time_init,
.init_machine = kirkwood_dt_init,
.restart = kirkwood_restart,
.dt_compat = kirkwood_dt_board_compat,

13
arch/arm/mach-mxs/mach-mxs.c
View File

@ -13,8 +13,6 @@
#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clocksource.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/gpio.h>
@ -490,16 +488,6 @@ static void mxs_restart(enum reboot_mode mode, const char *cmd)
soft_restart(0);
}
static void __init mxs_timer_init(void)
{
if (of_machine_is_compatible("fsl,imx23"))
mx23_clocks_init();
else
mx28_clocks_init();
of_clk_init(NULL);
clocksource_of_init();
}
static const char *mxs_dt_compat[] __initdata = {
"fsl,imx28",
"fsl,imx23",
@ -508,7 +496,6 @@ static const char *mxs_dt_compat[] __initdata = {
DT_MACHINE_START(MXS, "Freescale MXS (Device Tree)")
.handle_irq = icoll_handle_irq,
.init_time = mxs_timer_init,
.init_machine = mxs_machine_init,
.init_late = mxs_pm_init,
.dt_compat = mxs_dt_compat,

36
arch/arm/mach-nomadik/cpu-8815.c
View File

@ -25,8 +25,6 @@
#include <linux/slab.h>
#include <linux/irq.h>
#include <linux/dma-mapping.h>
#include <linux/platform_data/clk-nomadik.h>
#include <linux/clocksource.h>
#include <linux/of_irq.h>
#include <linux/of_gpio.h>
#include <linux/of_address.h>
@ -111,39 +109,6 @@ static void cpu8815_restart(enum reboot_mode mode, const char *cmd)
writel(1, srcbase + 0x18);
}
/* Initial value for SRC control register: all timers use MXTAL/8 source */
#define SRC_CR_INIT_MASK 0x00007fff
#define SRC_CR_INIT_VAL 0x2aaa8000
static void __init cpu8815_timer_init_of(void)
{
struct device_node *mtu;
void __iomem *base;
int irq;
u32 src_cr;
/* We need this to be up now */
nomadik_clk_init();
mtu = of_find_node_by_path("/mtu@101e2000");
if (!mtu)
return;
base = of_iomap(mtu, 0);
if (WARN_ON(!base))
return;
irq = irq_of_parse_and_map(mtu, 0);
pr_info("Remapped MTU @ %p, irq: %d\n", base, irq);
/* Configure timer sources in "system reset controller" ctrl reg */
src_cr = readl(base);
src_cr &= SRC_CR_INIT_MASK;
src_cr |= SRC_CR_INIT_VAL;
writel(src_cr, base);
clocksource_of_init();
}
/*
* The SMSC911x IRQ is connected to a GPIO pin, but the driver expects
* to simply request an IRQ passed as a resource. So the GPIO pin needs
@ -226,7 +191,6 @@ static const char * cpu8815_board_compat[] = {
DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
.map_io = cpu8815_map_io,
.init_time = cpu8815_timer_init_of,
.init_machine = cpu8815_init_of,
.restart = cpu8815_restart,
.dt_compat = cpu8815_board_compat,

9
arch/arm/mach-nspire/nspire.c
View File

@ -14,11 +14,9 @@
#include <linux/of_platform.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-vic.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
@ -65,12 +63,6 @@ static void __init nspire_init(void)
nspire_auxdata, NULL);
}
static void __init nspire_init_time(void)
{
of_clk_init(NULL);
clocksource_of_init();
}
static void nspire_restart(char mode, const char *cmd)
{
void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
@ -83,7 +75,6 @@ static void nspire_restart(char mode, const char *cmd)
DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
.dt_compat = nspire_dt_match,
.map_io = nspire_map_io,
.init_time = nspire_init_time,
.init_machine = nspire_init,
.restart = nspire_restart,
MACHINE_END

11
arch/arm/mach-prima2/common.c
View File

@ -6,7 +6,6 @@
* Licensed under GPLv2 or later.
*/
#include <linux/clocksource.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/sizes.h>
@ -21,13 +20,6 @@ void __init sirfsoc_init_late(void)
sirfsoc_pm_init();
}
static __init void sirfsoc_init_time(void)
{
/* initialize clocking early, we want to set the OS timer */
sirfsoc_of_clk_init();
clocksource_of_init();
}
static __init void sirfsoc_map_io(void)
{
sirfsoc_map_lluart();
@ -43,7 +35,6 @@ static const char *atlas6_dt_match[] __initdata = {
DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.map_io = sirfsoc_map_io,
.init_time = sirfsoc_init_time,
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
.restart = sirfsoc_restart,
@ -59,7 +50,6 @@ static const char *prima2_dt_match[] __initdata = {
DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.map_io = sirfsoc_map_io,
.init_time = sirfsoc_init_time,
.dma_zone_size = SZ_256M,
.init_late = sirfsoc_init_late,
.dt_compat = prima2_dt_match,
@ -77,7 +67,6 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.smp = smp_ops(sirfsoc_smp_ops),
.map_io = sirfsoc_map_io,
.init_time = sirfsoc_init_time,
.init_late = sirfsoc_init_late,
.dt_compat = marco_dt_match,
.restart = sirfsoc_restart,

1
arch/arm/mach-prima2/common.h
View File

@ -23,7 +23,6 @@ extern void sirfsoc_secondary_startup(void);
extern void sirfsoc_cpu_die(unsigned int cpu);
extern void __init sirfsoc_of_irq_init(void);
extern void __init sirfsoc_of_clk_init(void);
extern void sirfsoc_restart(enum reboot_mode, const char *);
extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);

9
arch/arm/mach-rockchip/rockchip.c
View File

@ -19,18 +19,10 @@
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/irqchip.h>
#include <linux/dw_apb_timer.h>
#include <linux/clk-provider.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/hardware/cache-l2x0.h>
static void __init rockchip_timer_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
}
static void __init rockchip_dt_init(void)
{
l2x0_of_init(0, ~0UL);
@ -47,6 +39,5 @@ static const char * const rockchip_board_dt_compat[] = {
DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
.init_machine = rockchip_dt_init,
.init_time = rockchip_timer_init,
.dt_compat = rockchip_board_dt_compat,
MACHINE_END

2
arch/arm/mach-socfpga/socfpga.c
View File

@ -14,7 +14,6 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/clk-provider.h>
#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
@ -107,7 +106,6 @@ static void __init socfpga_cyclone5_init(void)
{
l2x0_of_init(0, ~0UL);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
of_clk_init(NULL);
socfpga_init_clocks();
}

10
arch/arm/mach-sti/board-dt.c
View File

@ -7,9 +7,8 @@
* published by the Free Software Foundation.
*/
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/irq.h>
#include <linux/of_platform.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
@ -28,11 +27,10 @@ void __init stih41x_l2x0_init(void)
l2x0_of_init(aux_ctrl, L2X0_AUX_CTRL_MASK);
}
static void __init stih41x_timer_init(void)
static void __init stih41x_machine_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
stih41x_l2x0_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *stih41x_dt_match[] __initdata = {
@ -42,7 +40,7 @@ static const char *stih41x_dt_match[] __initdata = {
};
DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
.init_time = stih41x_timer_init,
.init_machine = stih41x_machine_init,
.smp = smp_ops(sti_smp_ops),
.dt_compat = stih41x_dt_match,
MACHINE_END

10
arch/arm/mach-sunxi/sunxi.c
View File

@ -10,7 +10,6 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/clocksource.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/init.h>
@ -20,8 +19,6 @@
#include <linux/io.h>
#include <linux/reboot.h>
#include <linux/clk/sunxi.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/system_misc.h>
@ -116,12 +113,6 @@ static void sunxi_setup_restart(void)
arm_pm_restart = of_id->data;
}
static void __init sunxi_timer_init(void)
{
sunxi_init_clocks();
clocksource_of_init();
}
static void __init sunxi_dt_init(void)
{
sunxi_setup_restart();
@ -140,6 +131,5 @@ static const char * const sunxi_board_dt_compat[] = {
DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
.init_machine = sunxi_dt_init,
.init_time = sunxi_timer_init,
.dt_compat = sunxi_board_dt_compat,
MACHINE_END

4
arch/arm/mach-tegra/common.c
View File

@ -24,7 +24,6 @@
#include <linux/delay.h>
#include <linux/reboot.h>
#include <linux/irqchip.h>
#include <linux/clk-provider.h>
#include <asm/hardware/cache-l2x0.h>
@ -61,8 +60,7 @@ u32 tegra_uart_config[4] = {
#ifdef CONFIG_OF
void __init tegra_dt_init_irq(void)
{
of_clk_init(NULL);
tegra_pmc_init();
tegra_pmc_init_irq();
tegra_init_irq();
irqchip_init();
tegra_legacy_irq_syscore_init();

41
arch/arm/mach-tegra/pmc.c
View File

@ -285,7 +285,28 @@ static const struct of_device_id matches[] __initconst = {
{ }
};
static void __init tegra_pmc_parse_dt(void)
void __init tegra_pmc_init_irq(void)
{
struct device_node *np;
u32 val;
np = of_find_matching_node(NULL, matches);
BUG_ON(!np);
tegra_pmc_base = of_iomap(np, 0);
tegra_pmc_invert_interrupt = of_property_read_bool(np,
"nvidia,invert-interrupt");
val = tegra_pmc_readl(PMC_CTRL);
if (tegra_pmc_invert_interrupt)
val |= PMC_CTRL_INTR_LOW;
else
val &= ~PMC_CTRL_INTR_LOW;
tegra_pmc_writel(val, PMC_CTRL);
}
void __init tegra_pmc_init(void)
{
struct device_node *np;
u32 prop;
@ -296,10 +317,6 @@ static void __init tegra_pmc_parse_dt(void)
np = of_find_matching_node(NULL, matches);
BUG_ON(!np);
tegra_pmc_base = of_iomap(np, 0);
tegra_pmc_invert_interrupt = of_property_read_bool(np,
"nvidia,invert-interrupt");
tegra_pclk = of_clk_get_by_name(np, "pclk");
WARN_ON(IS_ERR(tegra_pclk));
@ -365,17 +382,3 @@ static void __init tegra_pmc_parse_dt(void)
pmc_pm_data.suspend_mode = suspend_mode;
}
void __init tegra_pmc_init(void)
{
u32 val;
tegra_pmc_parse_dt();
val = tegra_pmc_readl(PMC_CTRL);
if (tegra_pmc_invert_interrupt)
val |= PMC_CTRL_INTR_LOW;
else
val &= ~PMC_CTRL_INTR_LOW;
tegra_pmc_writel(val, PMC_CTRL);
}

1
arch/arm/mach-tegra/pmc.h
View File

@ -39,6 +39,7 @@ bool tegra_pmc_cpu_is_powered(int cpuid);
int tegra_pmc_cpu_power_on(int cpuid);
int tegra_pmc_cpu_remove_clamping(int cpuid);
void tegra_pmc_init_irq(void);
void tegra_pmc_init(void);
#endif

5
arch/arm/mach-tegra/tegra.c
View File

@ -16,7 +16,6 @@
*
*/
#include <linux/clocksource.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
@ -44,6 +43,7 @@
#include "common.h"
#include "fuse.h"
#include "iomap.h"
#include "pmc.h"
static void __init tegra_dt_init(void)
{
@ -51,6 +51,8 @@ static void __init tegra_dt_init(void)
struct soc_device *soc_dev;
struct device *parent = NULL;
tegra_pmc_init();
tegra_clocks_apply_init_table();
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
@ -119,7 +121,6 @@ DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
.smp = smp_ops(tegra_smp_ops),
.init_early = tegra_init_early,
.init_irq = tegra_dt_init_irq,
.init_time = clocksource_of_init,
.init_machine = tegra_dt_init,
.init_late = tegra_dt_init_late,
.restart = tegra_assert_system_reset,

14
arch/arm/mach-vexpress/v2m.c
View File

@ -1,12 +1,10 @@
/*
* Versatile Express V2M Motherboard Support
*/
#include <linux/clocksource.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <linux/clocksource.h>
#include <linux/smp.h>
#include <linux/init.h>
#include <linux/of_address.h>
@ -22,7 +20,6 @@
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/vexpress.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <asm/mach-types.h>
@ -422,16 +419,8 @@ void __init v2m_dt_init_early(void)
pr_warning("vexpress: DT HBI (%x) is not matching "
"hardware (%x)!\n", dt_hbi, hbi);
}
}
static void __init v2m_dt_timer_init(void)
{
of_clk_init(NULL);
clocksource_of_init();
versatile_sched_clock_init(vexpress_get_24mhz_clock_base(),
24000000);
versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), 24000000);
}
static const struct of_device_id v2m_dt_bus_match[] __initconst = {
@ -458,6 +447,5 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
.smp_init = smp_init_ops(vexpress_smp_init_ops),
.map_io = v2m_dt_map_io,
.init_early = v2m_dt_init_early,
.init_time = v2m_dt_timer_init,
.init_machine = v2m_dt_init,
MACHINE_END

24
arch/arm/mach-vt8500/common.h
View File

@ -1,24 +0,0 @@
/* linux/arch/arm/mach-vt8500/dt_common.h
*
* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ARCH_ARM_MACH_VT8500_DT_COMMON_H
#define __ARCH_ARM_MACH_VT8500_DT_COMMON_H
#include <linux/of.h>
/* defined in drivers/clk/clk-vt8500.c */
void __init vtwm_clk_init(void __iomem *pmc_base);
#endif

6
arch/arm/mach-vt8500/vt8500.c
View File

@ -18,7 +18,6 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/clocksource.h>
#include <linux/io.h>
#include <linux/pm.h>
#include <linux/reboot.h>
@ -33,8 +32,6 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include "common.h"
#define LEGACY_GPIO_BASE 0xD8110000
#define LEGACY_PMC_BASE 0xD8130000
@ -162,8 +159,6 @@ void __init vt8500_init(void)
else
pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
vtwm_clk_init(pmc_base);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
@ -180,7 +175,6 @@ DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
.dt_compat = vt8500_dt_compat,
.map_io = vt8500_map_io,
.init_machine = vt8500_init,
.init_time = clocksource_of_init,
.restart = vt8500_restart,
MACHINE_END

8
drivers/clk/clk-bcm2835.c
View File

@ -20,14 +20,8 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/bcm2835.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
static const struct of_device_id clk_match[] __initconst = {
{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
{ }
};
/*
* These are fixed clocks. They're probably not all root clocks and it may
* be possible to turn them on and off but until this is mapped out better
@ -63,6 +57,4 @@ void __init bcm2835_init_clocks(void)
ret = clk_register_clkdev(clk, NULL, "20215000.uart");
if (ret)
pr_err("uart1_pclk alias not registered\n");
of_clk_init(clk_match);
}

10
drivers/clk/clk-highbank.c
View File

@ -20,8 +20,7 @@
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/of.h>
extern void __iomem *sregs_base;
#include <linux/of_address.h>
#define HB_PLL_LOCK_500 0x20000000
#define HB_PLL_LOCK 0x10000000
@ -280,6 +279,7 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
const char *clk_name = node->name;
const char *parent_name;
struct clk_init_data init;
struct device_node *srnp;
int rc;
rc = of_property_read_u32(node, "reg", &reg);
@ -290,7 +290,11 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
if (WARN_ON(!hb_clk))
return NULL;
hb_clk->reg = sregs_base + reg;
/* Map system registers */
srnp = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
hb_clk->reg = of_iomap(srnp, 0);
BUG_ON(!hb_clk->reg);
hb_clk->reg += reg;
of_property_read_string(node, "clock-output-names", &clk_name);

182
drivers/clk/clk-nomadik.c
View File

@ -27,6 +27,14 @@
*/
#define SRC_CR 0x00U
#define SRC_CR_T0_ENSEL BIT(15)
#define SRC_CR_T1_ENSEL BIT(17)
#define SRC_CR_T2_ENSEL BIT(19)
#define SRC_CR_T3_ENSEL BIT(21)
#define SRC_CR_T4_ENSEL BIT(23)
#define SRC_CR_T5_ENSEL BIT(25)
#define SRC_CR_T6_ENSEL BIT(27)
#define SRC_CR_T7_ENSEL BIT(29)
#define SRC_XTALCR 0x0CU
#define SRC_XTALCR_XTALTIMEN BIT(20)
#define SRC_XTALCR_SXTALDIS BIT(19)
@ -54,6 +62,79 @@ static DEFINE_SPINLOCK(src_lock);
/* Base address of the SRC */
static void __iomem *src_base;
static int nomadik_clk_reboot_handler(struct notifier_block *this,
unsigned long code,
void *unused)
{
u32 val;
/* The main chrystal need to be enabled for reboot to work */
val = readl(src_base + SRC_XTALCR);
val &= ~SRC_XTALCR_MXTALOVER;
val |= SRC_XTALCR_MXTALEN;
pr_crit("force-enabling MXTALO\n");
writel(val, src_base + SRC_XTALCR);
return NOTIFY_OK;
}
static struct notifier_block nomadik_clk_reboot_notifier = {
.notifier_call = nomadik_clk_reboot_handler,
};
static const struct of_device_id nomadik_src_match[] __initconst = {
{ .compatible = "stericsson,nomadik-src" },
{ /* sentinel */ }
};
static void nomadik_src_init(void)
{
struct device_node *np;
u32 val;
np = of_find_matching_node(NULL, nomadik_src_match);
if (!np) {
pr_crit("no matching node for SRC, aborting clock init\n");
return;
}
src_base = of_iomap(np, 0);
if (!src_base) {
pr_err("%s: must have src parent node with REGS (%s)\n",
__func__, np->name);
return;
}
/* Set all timers to use the 2.4 MHz TIMCLK */
val = readl(src_base + SRC_CR);
val |= SRC_CR_T0_ENSEL;
val |= SRC_CR_T1_ENSEL;
val |= SRC_CR_T2_ENSEL;
val |= SRC_CR_T3_ENSEL;
val |= SRC_CR_T4_ENSEL;
val |= SRC_CR_T5_ENSEL;
val |= SRC_CR_T6_ENSEL;
val |= SRC_CR_T7_ENSEL;
writel(val, src_base + SRC_CR);
val = readl(src_base + SRC_XTALCR);
pr_info("SXTALO is %s\n",
(val & SRC_XTALCR_SXTALDIS) ? "disabled" : "enabled");
pr_info("MXTAL is %s\n",
(val & SRC_XTALCR_MXTALSTAT) ? "enabled" : "disabled");
if (of_property_read_bool(np, "disable-sxtalo")) {
/* The machine uses an external oscillator circuit */
val |= SRC_XTALCR_SXTALDIS;
pr_info("disabling SXTALO\n");
}
if (of_property_read_bool(np, "disable-mxtalo")) {
/* Disable this too: also run by external oscillator */
val |= SRC_XTALCR_MXTALOVER;
val &= ~SRC_XTALCR_MXTALEN;
pr_info("disabling MXTALO\n");
}
writel(val, src_base + SRC_XTALCR);
register_reboot_notifier(&nomadik_clk_reboot_notifier);
}
/**
* struct clk_pll1 - Nomadik PLL1 clock
* @hw: corresponding clock hardware entry
@ -431,6 +512,9 @@ static void __init of_nomadik_pll_setup(struct device_node *np)
const char *parent_name;
u32 pll_id;
if (!src_base)
nomadik_src_init();
if (of_property_read_u32(np, "pll-id", &pll_id)) {
pr_err("%s: PLL \"%s\" missing pll-id property\n",
__func__, clk_name);
@ -441,6 +525,8 @@ static void __init of_nomadik_pll_setup(struct device_node *np)
if (!IS_ERR(clk))
of_clk_add_provider(np, of_clk_src_simple_get, clk);
}
CLK_OF_DECLARE(nomadik_pll_clk,
"st,nomadik-pll-clock", of_nomadik_pll_setup);
static void __init of_nomadik_hclk_setup(struct device_node *np)
{
@ -448,6 +534,9 @@ static void __init of_nomadik_hclk_setup(struct device_node *np)
const char *clk_name = np->name;
const char *parent_name;
if (!src_base)
nomadik_src_init();
parent_name = of_clk_get_parent_name(np, 0);
/*
* The HCLK divides PLL1 with 1 (passthru), 2, 3 or 4.
@ -460,6 +549,8 @@ static void __init of_nomadik_hclk_setup(struct device_node *np)
if (!IS_ERR(clk))
of_clk_add_provider(np, of_clk_src_simple_get, clk);
}
CLK_OF_DECLARE(nomadik_hclk_clk,
"st,nomadik-hclk-clock", of_nomadik_hclk_setup);
static void __init of_nomadik_src_clk_setup(struct device_node *np)
{
@ -468,6 +559,9 @@ static void __init of_nomadik_src_clk_setup(struct device_node *np)
const char *parent_name;
u32 clk_id;
if (!src_base)
nomadik_src_init();
if (of_property_read_u32(np, "clock-id", &clk_id)) {
pr_err("%s: SRC clock \"%s\" missing clock-id property\n",
__func__, clk_name);
@ -478,89 +572,5 @@ static void __init of_nomadik_src_clk_setup(struct device_node *np)
if (!IS_ERR(clk))
of_clk_add_provider(np, of_clk_src_simple_get, clk);
}
static const struct of_device_id nomadik_src_match[] __initconst = {
{ .compatible = "stericsson,nomadik-src" },
{ /* sentinel */ }
};
static const struct of_device_id nomadik_src_clk_match[] __initconst = {
{
.compatible = "fixed-clock",
.data = of_fixed_clk_setup,
},
{
.compatible = "fixed-factor-clock",
.data = of_fixed_factor_clk_setup,
},
{
.compatible = "st,nomadik-pll-clock",
.data = of_nomadik_pll_setup,
},
{
.compatible = "st,nomadik-hclk-clock",
.data = of_nomadik_hclk_setup,
},
{
.compatible = "st,nomadik-src-clock",
.data = of_nomadik_src_clk_setup,
},
{ /* sentinel */ }
};
static int nomadik_clk_reboot_handler(struct notifier_block *this,
unsigned long code,
void *unused)
{
u32 val;
/* The main chrystal need to be enabled for reboot to work */
val = readl(src_base + SRC_XTALCR);
val &= ~SRC_XTALCR_MXTALOVER;
val |= SRC_XTALCR_MXTALEN;
pr_crit("force-enabling MXTALO\n");
writel(val, src_base + SRC_XTALCR);
return NOTIFY_OK;
}
static struct notifier_block nomadik_clk_reboot_notifier = {
.notifier_call = nomadik_clk_reboot_handler,
};
void __init nomadik_clk_init(void)
{
struct device_node *np;
u32 val;
np = of_find_matching_node(NULL, nomadik_src_match);
if (!np) {
pr_crit("no matching node for SRC, aborting clock init\n");
return;
}
src_base = of_iomap(np, 0);
if (!src_base) {
pr_err("%s: must have src parent node with REGS (%s)\n",
__func__, np->name);
return;
}
val = readl(src_base + SRC_XTALCR);
pr_info("SXTALO is %s\n",
(val & SRC_XTALCR_SXTALDIS) ? "disabled" : "enabled");
pr_info("MXTAL is %s\n",
(val & SRC_XTALCR_MXTALSTAT) ? "enabled" : "disabled");
if (of_property_read_bool(np, "disable-sxtalo")) {
/* The machine uses an external oscillator circuit */
val |= SRC_XTALCR_SXTALDIS;
pr_info("disabling SXTALO\n");
}
if (of_property_read_bool(np, "disable-mxtalo")) {
/* Disable this too: also run by external oscillator */
val |= SRC_XTALCR_MXTALOVER;
val &= ~SRC_XTALCR_MXTALEN;
pr_info("disabling MXTALO\n");
}
writel(val, src_base + SRC_XTALCR);
register_reboot_notifier(&nomadik_clk_reboot_notifier);
of_clk_init(nomadik_src_clk_match);
}
CLK_OF_DECLARE(nomadik_src_clk,
"st,nomadik-src-clock", of_nomadik_src_clk_setup);

29
drivers/clk/clk-prima2.c
View File

@ -1015,16 +1015,6 @@ static struct clk_std clk_usb1 = {
},
};
static struct of_device_id clkc_ids[] = {
{ .compatible = "sirf,prima2-clkc" },
{},
};
static struct of_device_id rsc_ids[] = {
{ .compatible = "sirf,prima2-rsc" },
{},
};
enum prima2_clk_index {
/* 0 1 2 3 4 5 6 7 8 9 */
rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps,
@ -1082,24 +1072,16 @@ static struct clk_hw *prima2_clk_hw_array[maxclk] __initdata = {
static struct clk *prima2_clks[maxclk];
static struct clk_onecell_data clk_data;
void __init sirfsoc_of_clk_init(void)
static void __init sirfsoc_clk_init(struct device_node *np)
{
struct device_node *np;
struct device_node *rscnp;
int i;
np = of_find_matching_node(NULL, rsc_ids);
if (!np)
panic("unable to find compatible rsc node in dtb\n");
sirfsoc_rsc_vbase = of_iomap(np, 0);
rscnp = of_find_compatible_node(NULL, NULL, "sirf,prima2-rsc");
sirfsoc_rsc_vbase = of_iomap(rscnp, 0);
if (!sirfsoc_rsc_vbase)
panic("unable to map rsc registers\n");
of_node_put(np);
np = of_find_matching_node(NULL, clkc_ids);
if (!np)
return;
of_node_put(rscnp);
sirfsoc_clk_vbase = of_iomap(np, 0);
if (!sirfsoc_clk_vbase)
@ -1124,3 +1106,4 @@ void __init sirfsoc_of_clk_init(void)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
CLK_OF_DECLARE(sirfsoc_clk, "sirf,prima2-clkc", sirfsoc_clk_init);

34
drivers/clk/clk-vt8500.c
View File

@ -15,11 +15,14 @@
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/slab.h>
#include <linux/bitops.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#define LEGACY_PMC_BASE 0xD8130000
/* All clocks share the same lock as none can be changed concurrently */
static DEFINE_SPINLOCK(_lock);
@ -53,6 +56,21 @@ struct clk_pll {
static void __iomem *pmc_base;
static __init void vtwm_set_pmc_base(void)
{
struct device_node *np =
of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
if (np)
pmc_base = of_iomap(np, 0);
else
pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
of_node_put(np);
if (!pmc_base)
pr_err("%s:of_iomap(pmc) failed\n", __func__);
}
#define to_clk_device(_hw) container_of(_hw, struct clk_device, hw)
#define VT8500_PMC_BUSY_MASK 0x18
@ -222,6 +240,9 @@ static __init void vtwm_device_clk_init(struct device_node *node)
int rc;
int clk_init_flags = 0;
if (!pmc_base)
vtwm_set_pmc_base();
dev_clk = kzalloc(sizeof(*dev_clk), GFP_KERNEL);
if (WARN_ON(!dev_clk))
return;
@ -636,6 +657,9 @@ static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
struct clk_init_data init;
int rc;
if (!pmc_base)
vtwm_set_pmc_base();
rc = of_property_read_u32(node, "reg", &reg);
if (WARN_ON(rc))
return;
@ -694,13 +718,3 @@ static void __init wm8850_pll_init(struct device_node *node)
vtwm_pll_clk_init(node, PLL_TYPE_WM8850);
}
CLK_OF_DECLARE(wm8850_pll, "wm,wm8850-pll-clock", wm8850_pll_init);
void __init vtwm_clk_init(void __iomem *base)
{
if (!base)
return;
pmc_base = base;
of_clk_init(NULL);
}

15
drivers/clk/mxs/clk-imx23.c
View File

@ -12,6 +12,7 @@
#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
@ -100,16 +101,16 @@ static enum imx23_clk clks_init_on[] __initdata = {
cpu, hbus, xbus, emi, uart,
};
int __init mx23_clocks_init(void)
static void __init mx23_clocks_init(struct device_node *np)
{
struct device_node *np;
struct device_node *dcnp;
u32 i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
digctrl = of_iomap(np, 0);
dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
digctrl = of_iomap(dcnp, 0);
WARN_ON(!digctrl);
of_node_put(dcnp);
np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl");
clkctrl = of_iomap(np, 0);
WARN_ON(!clkctrl);
@ -162,7 +163,7 @@ int __init mx23_clocks_init(void)
if (IS_ERR(clks[i])) {
pr_err("i.MX23 clk %d: register failed with %ld\n",
i, PTR_ERR(clks[i]));
return PTR_ERR(clks[i]);
return;
}
clk_data.clks = clks;
@ -172,5 +173,5 @@ int __init mx23_clocks_init(void)
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clks[clks_init_on[i]]);
return 0;
}
CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);

16
drivers/clk/mxs/clk-imx28.c
View File

@ -12,6 +12,7 @@
#include <linux/clk.h>
#include <linux/clk/mxs.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
@ -154,16 +155,16 @@ static enum imx28_clk clks_init_on[] __initdata = {
cpu, hbus, xbus, emi, uart,
};
int __init mx28_clocks_init(void)
static void __init mx28_clocks_init(struct device_node *np)
{
struct device_node *np;
struct device_node *dcnp;
u32 i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
digctrl = of_iomap(np, 0);
dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
digctrl = of_iomap(dcnp, 0);
WARN_ON(!digctrl);
of_node_put(dcnp);
np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl");
clkctrl = of_iomap(np, 0);
WARN_ON(!clkctrl);
@ -239,7 +240,7 @@ int __init mx28_clocks_init(void)
if (IS_ERR(clks[i])) {
pr_err("i.MX28 clk %d: register failed with %ld\n",
i, PTR_ERR(clks[i]));
return PTR_ERR(clks[i]);
return;
}
clk_data.clks = clks;
@ -250,6 +251,5 @@ int __init mx28_clocks_init(void)
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clks[clks_init_on[i]]);
return 0;
}
CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init);

11
drivers/clk/sunxi/clk-sunxi.c
View File

@ -16,7 +16,6 @@
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/clk/sunxi.h>
#include <linux/of.h>
#include <linux/of_address.h>
@ -617,11 +616,8 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
}
}
void __init sunxi_init_clocks(void)
static void __init sunxi_init_clocks(struct device_node *np)
{
/* Register all the simple and basic clocks on DT */
of_clk_init(NULL);
/* Register factor clocks */
of_sunxi_table_clock_setup(clk_factors_match, sunxi_factors_clk_setup);
@ -634,3 +630,8 @@ void __init sunxi_init_clocks(void)
/* Register gate clocks */
of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
}
CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks);
CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);
CLK_OF_DECLARE(sun5i_a13_clk_init, "allwinner,sun5i-a13", sunxi_init_clocks);
CLK_OF_DECLARE(sun6i_a31_clk_init, "allwinner,sun6i-a31", sunxi_init_clocks);
CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sunxi_init_clocks);

2
include/linux/clk/mxs.h
View File

@ -9,8 +9,6 @@
#ifndef __LINUX_CLK_MXS_H
#define __LINUX_CLK_MXS_H
int mx23_clocks_init(void);
int mx28_clocks_init(void);
int mxs_saif_clkmux_select(unsigned int clkmux);
#endif

22
include/linux/clk/sunxi.h
View File

@ -1,22 +0,0 @@
/*
* Copyright 2012 Maxime Ripard
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __LINUX_CLK_SUNXI_H_
#define __LINUX_CLK_SUNXI_H_
void __init sunxi_init_clocks(void);
#endif

2
include/linux/platform_data/clk-nomadik.h
View File

@ -1,2 +0,0 @@
/* Minimal platform data header */
void nomadik_clk_init(void);