fsl/qe: add bit description for SYNL register for GUMR
Add the bitmask for the two bit SYNL register according to the QUICK Engine Reference Manual. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -668,6 +668,10 @@ struct ucc_slow_pram {
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#define UCC_FAST_GUMR_CTSS 0x00800000
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#define UCC_FAST_GUMR_TXSY 0x00020000
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#define UCC_FAST_GUMR_RSYN 0x00010000
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#define UCC_FAST_GUMR_SYNL_MASK 0x0000C000
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#define UCC_FAST_GUMR_SYNL_16 0x0000C000
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#define UCC_FAST_GUMR_SYNL_8 0x00008000
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#define UCC_FAST_GUMR_SYNL_AUTO 0x00004000
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#define UCC_FAST_GUMR_RTSM 0x00002000
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#define UCC_FAST_GUMR_REVD 0x00000400
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#define UCC_FAST_GUMR_ENR 0x00000020
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