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net: phy: cavium: Improve __iomem mess 

The MIPS low level register access functions seem to be missing
__iomem annotation. This causes lots of sparse warnings, when code
casts off the __iomem. Make the Cavium MDIO drivers cleaner by pushing
the casts lower down into the helpers, allow the drivers to work as
normal, with __iomem.

bus->register_base is now an void *, rather than a u64. So forming the
mii_bus->id string cannot use %llx any more. Use %px, so this kernel
address is still exposed to user space, as it was before.

v2: s/cases/causes/g

Cc: Sunil Goutham <sgoutham@marvell.com>
Cc: Robert Richter <rrichter@marvell.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Andrew Lunn 2020-07-07 03:49:38 +02:00 committed by David S. Miller
parent 82e7627fd4
commit c7b04d1030
3 changed files with 10 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/net/phy/mdio-cavium.h
View File

@ -90,7 +90,7 @@ union cvmx_smix_wr_dat {
struct cavium_mdiobus {
struct mii_bus *mii_bus;
u64 register_base;
void __iomem *register_base;
enum cavium_mdiobus_mode mode;
};
@ -98,20 +98,20 @@ struct cavium_mdiobus {
#include <asm/octeon/octeon.h>
static inline void oct_mdio_writeq(u64 val, u64 addr)
static inline void oct_mdio_writeq(u64 val, void __iomem *addr)
{
cvmx_write_csr(addr, val);
cvmx_write_csr((u64 __force)addr, val);
}
static inline u64 oct_mdio_readq(u64 addr)
static inline u64 oct_mdio_readq(void __iomem *addr)
{
return cvmx_read_csr(addr);
return cvmx_read_csr((u64 __force)addr);
}
#else
#include <linux/io-64-nonatomic-lo-hi.h>
#define oct_mdio_writeq(val, addr) writeq(val, (void *)addr)
#define oct_mdio_readq(addr) readq((void *)addr)
#define oct_mdio_writeq(val, addr) writeq(val, addr)
#define oct_mdio_readq(addr) readq(addr)
#endif
int cavium_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum);

5
drivers/net/phy/mdio-octeon.c
View File

@ -44,8 +44,7 @@ static int octeon_mdiobus_probe(struct platform_device *pdev)
return -ENXIO;
}
bus->register_base =
(u64)devm_ioremap(&pdev->dev, mdio_phys, regsize);
bus->register_base = devm_ioremap(&pdev->dev, mdio_phys, regsize);
if (!bus->register_base) {
dev_err(&pdev->dev, "dev_ioremap failed\n");
return -ENOMEM;
@ -56,7 +55,7 @@ static int octeon_mdiobus_probe(struct platform_device *pdev)
oct_mdio_writeq(smi_en.u64, bus->register_base + SMI_EN);
bus->mii_bus->name = KBUILD_MODNAME;
snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%llx", bus->register_base);
snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%px", bus->register_base);
bus->mii_bus->parent = &pdev->dev;
bus->mii_bus->read = cavium_mdiobus_read;

2
drivers/net/phy/mdio-thunder.c
View File

@ -84,7 +84,7 @@ static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
nexus->buses[i] = bus;
i++;
bus->register_base = (u64)nexus->bar0 +
bus->register_base = nexus->bar0 +
r.start - pci_resource_start(pdev, 0);
smi_en.u64 = 0;