Third PPC KVM update for 5.1
- Tell userspace about whether a particular hardware workaround for one of the Spectre vulnerabilities is available, so that userspace can inform the guest. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAABCAAGBQJceLfNAAoJEJ2a6ncsY3GfWnMH/1H4BQOcWnyBMkGX/IIVYmYP Fxr9QdYdp+sRDmIgtKugARiW/cNdmrcTlW9qsOSD/sNpCtEjQ0t3R717f51DvSvC J+RAnBD6dOP5qplvsUTPoU5xnkqBhxkyTJnEbG6zWGyvQNqLQlJEe3xI91c5r6RB PiurQMtE7Mw/YyPpkthTQcm+JSgZX5QDd+KNkzL1rcfAV/4HlSXblAklwYgdsbch m/X1HmnZVG/Seh9hH3q8hvp/YaPFvHOvoPWXaifwrZ3xNQ/tgCyGNJp+wupoay6K RYHfsYmfoW0AbLnJqLH0Zbm9xDwkoZYjLbdWht4N/B5G0P0vkpQ86bdauabxCXI= =mkez -----END PGP SIGNATURE----- Merge tag 'kvm-ppc-next-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD Third PPC KVM update for 5.1 - Tell userspace about whether a particular hardware workaround for one of the Spectre vulnerabilities is available, so that userspace can inform the guest.
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commit
c7a0e83cb6
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@ -619,7 +619,7 @@ static inline int kvmppc_xive_set_irq(struct kvm *kvm, int irq_source_id, u32 ir
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static inline void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu) { }
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#endif /* CONFIG_KVM_XIVE */
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#ifdef CONFIG_PPC_POWERNV
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#if defined(CONFIG_PPC_POWERNV) && defined(CONFIG_KVM_BOOK3S_64_HANDLER)
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static inline bool xics_on_xive(void)
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{
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return xive_enabled() && cpu_has_feature(CPU_FTR_HVMODE);
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@ -463,10 +463,12 @@ struct kvm_ppc_cpu_char {
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#define KVM_PPC_CPU_CHAR_BR_HINT_HONOURED (1ULL << 58)
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#define KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF (1ULL << 57)
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#define KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS (1ULL << 56)
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#define KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST (1ull << 54)
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#define KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY (1ULL << 63)
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#define KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR (1ULL << 62)
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#define KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ULL << 61)
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#define KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE (1ull << 58)
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/* Per-vcpu XICS interrupt controller state */
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#define KVM_REG_PPC_ICP_STATE (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c)
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@ -2189,10 +2189,12 @@ static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp)
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KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV |
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KVM_PPC_CPU_CHAR_BR_HINT_HONOURED |
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KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF |
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KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS;
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KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS |
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KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST;
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cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY |
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KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR |
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KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR;
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KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR |
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KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE;
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}
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return 0;
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}
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@ -2251,12 +2253,16 @@ static int kvmppc_get_cpu_char(struct kvm_ppc_cpu_char *cp)
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if (have_fw_feat(fw_features, "enabled",
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"fw-count-cache-disabled"))
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cp->character |= KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS;
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if (have_fw_feat(fw_features, "enabled",
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"fw-count-cache-flush-bcctr2,0,0"))
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cp->character |= KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST;
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cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 |
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KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED |
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KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 |
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KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 |
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KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV |
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KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS;
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KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS |
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KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST;
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if (have_fw_feat(fw_features, "enabled",
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"speculation-policy-favor-security"))
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@ -2267,9 +2273,13 @@ static int kvmppc_get_cpu_char(struct kvm_ppc_cpu_char *cp)
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if (!have_fw_feat(fw_features, "disabled",
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"needs-spec-barrier-for-bound-checks"))
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cp->behaviour |= KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR;
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if (have_fw_feat(fw_features, "enabled",
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"needs-count-cache-flush-on-context-switch"))
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cp->behaviour |= KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE;
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cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY |
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KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR |
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KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR;
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KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR |
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KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE;
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of_node_put(fw_features);
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}
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