Revert "riscv: dts: sophgo: Add sophgo,sg2024-uart compatibles"
Signed-off-by: haijiao.liu <haijiao.liu@sophgo.com>
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parent
a42bea5b28
commit
c751c5de3f
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@ -657,7 +657,7 @@
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};
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};
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uart0: serial@7040000000 {
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uart0: serial@7040000000 {
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compatible = "sophgo,sg2042-uart", "snps,dw-apb-uart";
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compatible = "snps,dw-apb-uart";
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reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
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reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <SOC_PERIPHERAL_IRQ(112) IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <SOC_PERIPHERAL_IRQ(112) IRQ_TYPE_LEVEL_HIGH>;
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@ -670,7 +670,7 @@
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};
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};
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uart1: serial@7040001000 {
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uart1: serial@7040001000 {
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compatible = "sophgo,sg2042-uart", "snps,dw-apb-uart";
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compatible = "snps,dw-apb-uart";
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reg = <0x00000070 0x40001000 0x00000000 0x00001000>;
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reg = <0x00000070 0x40001000 0x00000000 0x00001000>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <SOC_PERIPHERAL_IRQ(113) IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <SOC_PERIPHERAL_IRQ(113) IRQ_TYPE_LEVEL_HIGH>;
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@ -683,7 +683,7 @@
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};
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};
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uart2: serial@7040002000 {
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uart2: serial@7040002000 {
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compatible = "sophgo,sg2042-uart", "snps,dw-apb-uart";
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compatible = "snps,dw-apb-uart";
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reg = <0x00000070 0x40002000 0x00000000 0x00001000>;
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reg = <0x00000070 0x40002000 0x00000000 0x00001000>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <SOC_PERIPHERAL_IRQ(114) IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <SOC_PERIPHERAL_IRQ(114) IRQ_TYPE_LEVEL_HIGH>;
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@ -696,7 +696,7 @@
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};
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};
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uart3: serial@7040003000 {
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uart3: serial@7040003000 {
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compatible = "sophgo,sg2042-uart", "snps,dw-apb-uart";
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compatible = "snps,dw-apb-uart";
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reg = <0x00000070 0x40003000 0x00000000 0x00001000>;
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reg = <0x00000070 0x40003000 0x00000000 0x00001000>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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interrupts = <SOC_PERIPHERAL_IRQ(115) IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <SOC_PERIPHERAL_IRQ(115) IRQ_TYPE_LEVEL_HIGH>;
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