Staging: comedi: Move trailing statements to next line as requested by checkpatch
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
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197c82bf25
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c7427409cd
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@ -749,7 +749,8 @@ static int s626_attach(comedi_device *dev, comedi_devconfig *it)
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/* Write I2C control: abort any I2C activity. */
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/* Write I2C control: abort any I2C activity. */
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MC_ENABLE(P_MC2, MC2_UPLD_IIC);
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MC_ENABLE(P_MC2, MC2_UPLD_IIC);
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/* Invoke command upload */
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/* Invoke command upload */
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while ((RR7146(P_MC2) & MC2_UPLD_IIC) == 0);
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while ((RR7146(P_MC2) & MC2_UPLD_IIC) == 0)
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;
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/* and wait for upload to complete. */
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/* and wait for upload to complete. */
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/* Per SAA7146 data sheet, write to STATUS reg twice to
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/* Per SAA7146 data sheet, write to STATUS reg twice to
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@ -758,7 +759,8 @@ static int s626_attach(comedi_device *dev, comedi_devconfig *it)
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WR7146(P_I2CSTAT, I2C_CLKSEL);
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WR7146(P_I2CSTAT, I2C_CLKSEL);
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/* Write I2C control: reset error flags. */
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/* Write I2C control: reset error flags. */
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MC_ENABLE(P_MC2, MC2_UPLD_IIC); /* Invoke command upload */
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MC_ENABLE(P_MC2, MC2_UPLD_IIC); /* Invoke command upload */
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while (!MC_TEST(P_MC2, MC2_UPLD_IIC));
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while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
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;
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/* and wait for upload to complete. */
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/* and wait for upload to complete. */
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}
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}
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@ -1592,7 +1594,8 @@ static int s626_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
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/* shift into FB BUFFER 1 register. */
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/* shift into FB BUFFER 1 register. */
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/* Wait for ADC done. */
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/* Wait for ADC done. */
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while (!(RR7146(P_PSR) & PSR_GPIO2)) ;
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while (!(RR7146(P_PSR) & PSR_GPIO2))
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;
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/* Fetch ADC data. */
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/* Fetch ADC data. */
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if (n != 0)
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if (n != 0)
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@ -1624,7 +1627,8 @@ static int s626_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
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/* Wait for the data to arrive in FB BUFFER 1 register. */
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/* Wait for the data to arrive in FB BUFFER 1 register. */
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/* Wait for ADC done. */
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/* Wait for ADC done. */
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while (!(RR7146(P_PSR) & PSR_GPIO2)) ;
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while (!(RR7146(P_PSR) & PSR_GPIO2))
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;
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/* Fetch ADC data from audio interface's input shift register. */
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/* Fetch ADC data from audio interface's input shift register. */
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@ -2462,10 +2466,12 @@ static uint32_t I2Chandshake(comedi_device *dev, uint32_t val)
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/* upload confirmation. */
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/* upload confirmation. */
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MC_ENABLE(P_MC2, MC2_UPLD_IIC);
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MC_ENABLE(P_MC2, MC2_UPLD_IIC);
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while (!MC_TEST(P_MC2, MC2_UPLD_IIC)) ;
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while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
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;
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/* Wait until I2C bus transfer is finished or an error occurs. */
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/* Wait until I2C bus transfer is finished or an error occurs. */
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while ((RR7146(P_I2CCTRL) & (I2C_BUSY | I2C_ERR)) == I2C_BUSY) ;
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while ((RR7146(P_I2CCTRL) & (I2C_BUSY | I2C_ERR)) == I2C_BUSY)
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;
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/* Return non-zero if I2C error occured. */
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/* Return non-zero if I2C error occured. */
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return RR7146(P_I2CCTRL) & I2C_ERR;
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return RR7146(P_I2CCTRL) & I2C_ERR;
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@ -2579,7 +2585,8 @@ static void SendDAC(comedi_device *dev, uint32_t val)
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* Done by polling the DMAC enable flag; this flag is automatically
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* Done by polling the DMAC enable flag; this flag is automatically
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* cleared when the transfer has finished.
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* cleared when the transfer has finished.
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*/
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*/
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while ((RR7146(P_MC1) & MC1_A2OUT) != 0) ;
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while ((RR7146(P_MC1) & MC1_A2OUT) != 0)
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;
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/* START THE OUTPUT STREAM TO THE TARGET DAC -------------------- */
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/* START THE OUTPUT STREAM TO THE TARGET DAC -------------------- */
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@ -2596,7 +2603,8 @@ static void SendDAC(comedi_device *dev, uint32_t val)
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* finished transferring the DAC's data DWORD from the output FIFO
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* finished transferring the DAC's data DWORD from the output FIFO
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* to the output buffer register.
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* to the output buffer register.
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*/
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*/
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while ((RR7146(P_SSR) & SSR_AF2_OUT) == 0) ;
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while ((RR7146(P_SSR) & SSR_AF2_OUT) == 0)
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;
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/* Set up to trap execution at slot 0 when the TSL sequencer cycles
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/* Set up to trap execution at slot 0 when the TSL sequencer cycles
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* back to slot 0 after executing the EOS in slot 5. Also,
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* back to slot 0 after executing the EOS in slot 5. Also,
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@ -2632,7 +2640,8 @@ static void SendDAC(comedi_device *dev, uint32_t val)
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* from 0xFF to 0x00, which slot 0 causes to happen by shifting
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* from 0xFF to 0x00, which slot 0 causes to happen by shifting
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* out/in on SD2 the 0x00 that is always referenced by slot 5.
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* out/in on SD2 the 0x00 that is always referenced by slot 5.
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*/
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*/
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while ((RR7146(P_FB_BUFFER2) & 0xFF000000) != 0) ;
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while ((RR7146(P_FB_BUFFER2) & 0xFF000000) != 0)
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;
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}
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}
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/* Either (1) we were too late setting the slot 0 trap; the TSL
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/* Either (1) we were too late setting the slot 0 trap; the TSL
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* sequencer restarted slot 0 before we could set the EOS trap flag,
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* sequencer restarted slot 0 before we could set the EOS trap flag,
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@ -2648,7 +2657,8 @@ static void SendDAC(comedi_device *dev, uint32_t val)
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* the next DAC write. This is detected when FB_BUFFER2 MSB changes
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* the next DAC write. This is detected when FB_BUFFER2 MSB changes
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* from 0x00 to 0xFF.
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* from 0x00 to 0xFF.
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*/
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*/
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while ((RR7146(P_FB_BUFFER2) & 0xFF000000) == 0) ;
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while ((RR7146(P_FB_BUFFER2) & 0xFF000000) == 0)
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;
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}
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}
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static void WriteMISC2(comedi_device *dev, uint16_t NewImage)
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static void WriteMISC2(comedi_device *dev, uint16_t NewImage)
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@ -2687,10 +2697,12 @@ static void DEBItransfer(comedi_device *dev)
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/* Wait for completion of upload from shadow RAM to DEBI control */
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/* Wait for completion of upload from shadow RAM to DEBI control */
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/* register. */
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/* register. */
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while (!MC_TEST(P_MC2, MC2_UPLD_DEBI)) ;
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while (!MC_TEST(P_MC2, MC2_UPLD_DEBI))
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;
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/* Wait until DEBI transfer is done. */
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/* Wait until DEBI transfer is done. */
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while (RR7146(P_PSR) & PSR_DEBI_S) ;
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while (RR7146(P_PSR) & PSR_DEBI_S)
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;
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}
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}
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/* Write a value to a gate array register. */
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/* Write a value to a gate array register. */
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@ -55,7 +55,8 @@ int comedi_read_procmem(char *buf, char **start, off_t offset, int len,
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struct comedi_device_file_info *dev_file_info = comedi_get_device_file_info(i);
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struct comedi_device_file_info *dev_file_info = comedi_get_device_file_info(i);
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comedi_device *dev;
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comedi_device *dev;
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if (dev_file_info == NULL) continue;
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if (dev_file_info == NULL)
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continue;
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dev = dev_file_info->device;
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dev = dev_file_info->device;
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if (dev->attached) {
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if (dev->attached) {
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