s390/mm: introduce defines to reflect the hardware mmu
Add various defines like e.g. _REGION1_SHIFT to reflect the hardware mmu. We have quite a bit code that does not make use of the Linux memory management primitives but directly modifies page, segment and region values. Most of this is open-coded like e.g. "1UL << 53". In order to clean this up introduce a couple of new defines. The existing Linux memory management defines are changed, so the mapping to the hardware implementation is reflected. Reviewed-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@ -10,10 +10,14 @@
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#include <linux/const.h>
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#include <asm/types.h>
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#define _PAGE_SHIFT 12
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#define _PAGE_SIZE (_AC(1, UL) << _PAGE_SHIFT)
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#define _PAGE_MASK (~(_PAGE_SIZE - 1))
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/* PAGE_SHIFT determines the page size */
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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#define PAGE_SHIFT _PAGE_SHIFT
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#define PAGE_SIZE _PAGE_SIZE
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#define PAGE_MASK _PAGE_MASK
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#define PAGE_DEFAULT_ACC 0
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#define PAGE_DEFAULT_KEY (PAGE_DEFAULT_ACC << 4)
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@ -15,6 +15,8 @@
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#include <linux/gfp.h>
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#include <linux/mm.h>
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#define CRST_ALLOC_ORDER 2
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unsigned long *crst_table_alloc(struct mm_struct *);
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void crst_table_free(struct mm_struct *, unsigned long *);
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@ -65,26 +65,6 @@ extern unsigned long zero_page_mask;
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/* TODO: s390 cannot support io_remap_pfn_range... */
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#define PMD_SHIFT 20
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#define PUD_SHIFT 31
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#define P4D_SHIFT 42
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#define PGDIR_SHIFT 53
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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#define PUD_SIZE (1UL << PUD_SHIFT)
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#define PUD_MASK (~(PUD_SIZE-1))
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#define P4D_SIZE (1UL << P4D_SHIFT)
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#define P4D_MASK (~(P4D_SIZE-1))
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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#define PTRS_PER_PTE 256
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#define PTRS_PER_PMD 2048
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#define PTRS_PER_PUD 2048
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#define PTRS_PER_P4D 2048
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#define PTRS_PER_PGD 2048
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#define FIRST_USER_ADDRESS 0UL
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#define pte_ERROR(e) \
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@ -314,6 +294,54 @@ static inline int is_module_addr(void *addr)
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#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */
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#endif
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#define _CRST_ENTRIES 2048 /* number of region/segment table entries */
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#define _PAGE_ENTRIES 256 /* number of page table entries */
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#define _CRST_TABLE_SIZE (_CRST_ENTRIES * 8)
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#define _PAGE_TABLE_SIZE (_PAGE_ENTRIES * 8)
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#define _REGION1_SHIFT 53
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#define _REGION2_SHIFT 42
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#define _REGION3_SHIFT 31
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#define _SEGMENT_SHIFT 20
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#define _REGION1_INDEX (0x7ffUL << _REGION1_SHIFT)
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#define _REGION2_INDEX (0x7ffUL << _REGION2_SHIFT)
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#define _REGION3_INDEX (0x7ffUL << _REGION3_SHIFT)
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#define _SEGMENT_INDEX (0x7ffUL << _SEGMENT_SHIFT)
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#define _PAGE_INDEX (0xffUL << _PAGE_SHIFT)
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#define _REGION1_SIZE (1UL << _REGION1_SHIFT)
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#define _REGION2_SIZE (1UL << _REGION2_SHIFT)
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#define _REGION3_SIZE (1UL << _REGION3_SHIFT)
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#define _SEGMENT_SIZE (1UL << _SEGMENT_SHIFT)
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#define _REGION1_MASK (~(_REGION1_SIZE - 1))
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#define _REGION2_MASK (~(_REGION2_SIZE - 1))
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#define _REGION3_MASK (~(_REGION3_SIZE - 1))
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#define _SEGMENT_MASK (~(_SEGMENT_SIZE - 1))
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#define PMD_SHIFT _SEGMENT_SHIFT
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#define PUD_SHIFT _REGION3_SHIFT
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#define P4D_SHIFT _REGION2_SHIFT
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#define PGDIR_SHIFT _REGION1_SHIFT
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#define PMD_SIZE _SEGMENT_SIZE
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#define PUD_SIZE _REGION3_SIZE
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#define P4D_SIZE _REGION2_SIZE
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#define PGDIR_SIZE _REGION1_SIZE
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#define PMD_MASK _SEGMENT_MASK
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#define PUD_MASK _REGION3_MASK
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#define P4D_MASK _REGION2_MASK
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#define PGDIR_MASK _REGION1_MASK
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#define PTRS_PER_PTE _PAGE_ENTRIES
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#define PTRS_PER_PMD _CRST_ENTRIES
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#define PTRS_PER_PUD _CRST_ENTRIES
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#define PTRS_PER_P4D _CRST_ENTRIES
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#define PTRS_PER_PGD _CRST_ENTRIES
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/*
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* Segment table and region3 table entry encoding
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* (R = read-only, I = invalid, y = young bit):
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