irqchip/meson-gpio: Add support for Meson-G12A SoC
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of: - 223:100 undefined (no interrupt) - 99:97 3 pins on bank GPIOE - 96:77 20 pins on bank GPIOX - 76:61 16 pins on bank GPIOA - 60:53 8 pins on bank GPIOC - 52:37 16 pins on bank BOOT - 36:28 9 pins on bank GPIOH - 27:12 16 pins on bank GPIOZ - 11:0 12 pins in the AO domain Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -73,6 +73,7 @@ static const struct of_device_id meson_irq_gpio_matches[] = {
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{ .compatible = "amlogic,meson-gxbb-gpio-intc", .data = &gxbb_params },
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{ .compatible = "amlogic,meson-gxl-gpio-intc", .data = &gxl_params },
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{ .compatible = "amlogic,meson-axg-gpio-intc", .data = &axg_params },
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{ .compatible = "amlogic,meson-g12a-gpio-intc", .data = &axg_params },
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{ }
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};
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