- Drop an unused private data field in the AIC driver
- Various fixes to the realtek-rtl driver - Make the GICv3 ITS driver compile again in !SMP configurations - Force reset of the GICv3 ITSs at probe time to avoid issues during kexec - Yet another kfree/bitmap_free conversion - Various DT updates (Renesas, SiFive) (from Marc Zyngier) -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmH2c9sACgkQEsHwGGHe VUo6Sg//a69glfbs6zPFVFe26vQuSlpFXBgsErSkjaSQiOogk6gEZVjhZJOSbPB0 jLdFbe4E3tvYeB2k5kZv60O/dXgTOiHgyOgVFJxK5AKL5mG8miINR6xOI7Ol5mqA qWJJx26+hphao0Rx/uicY/mJoWR1Q2vMr52gwckhNUuejMZukCps1deenU63cSSt /wOiAx8YUQYmK7UvlshQnC+bY6OmzttUugX1a9CiMehivk/qpv+nTfl3GNi1WtkU witsnRmAboRPBL3Cdb9dQcWPm+5Hp/z7Z3ItFT5ca851JU6qYk9Utb9GXeTCmvAX gKCMtfmk6F1jvHWLaUct8KWlWGs9F+OPk4P+1bVSa0NPfRxodKNp/iGIcjLZSdVf Uv3djaztZFeQ3pi26or+2rWbvWiz1bxaCvUxl3v5urHy2m2Ie8HqbHg7zM1Qf6lt 1EFVkEMkVZIUD+9y2jvhgCEAy6KaOL1c7Vs9GAKh1jfv3PNB29WPB6L20g2vKXju uocAS2acpkHLKm3VhWoLYRtI57UWbPoMaqAFyK6oxs3LGuYRvyZyxxc4ccxue/A6 tUgOmhawnvI6QVmCCRAWaCtb5wz7oPy1vxWoLEzJMqWQolgkg9lqL94TM+0a361K HqYA/ck69LN/Sps7kaSvF//t9DVpa0OQQtY5ODfLs/X3KxPgdOQ= =BFYG -----END PGP SIGNATURE----- Merge tag 'irq_urgent_for_v5.17_rc2_p2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Borislav Petkov: - Drop an unused private data field in the AIC driver - Various fixes to the realtek-rtl driver - Make the GICv3 ITS driver compile again in !SMP configurations - Force reset of the GICv3 ITSs at probe time to avoid issues during kexec - Yet another kfree/bitmap_free conversion - Various DT updates (Renesas, SiFive) * tag 'irq_urgent_for_v5.17_rc2_p2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dt-bindings: interrupt-controller: sifive,plic: Group interrupt tuples dt-bindings: interrupt-controller: sifive,plic: Fix number of interrupts dt-bindings: irqchip: renesas-irqc: Add R-Car V3U support irqchip/gic-v3-its: Reset each ITS's BASERn register before probe irqchip/gic-v3-its: Fix build for !SMP irqchip/loongson-pch-ms: Use bitmap_free() to free bitmap irqchip/realtek-rtl: Service all pending interrupts irqchip/realtek-rtl: Fix off-by-one in routing irqchip/realtek-rtl: Map control data to virq irqchip/apple-aic: Drop unused ipi_hwirq field
This commit is contained in:
Linus Torvalds
commit
c5fe9de790
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@ -36,6 +36,7 @@ properties:
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- renesas,intc-ex-r8a77980 # R-Car V3H
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- renesas,intc-ex-r8a77990 # R-Car E3
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- renesas,intc-ex-r8a77995 # R-Car D3
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- renesas,intc-ex-r8a779a0 # R-Car V3U
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- const: renesas,irqc
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'#interrupt-cells':
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@ -62,6 +62,7 @@ properties:
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interrupts-extended:
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minItems: 1
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maxItems: 15872
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description:
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Specifies which contexts are connected to the PLIC, with "-1" specifying
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that a context is not present. Each node pointed to should be a
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@ -90,12 +91,11 @@ examples:
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#interrupt-cells = <1>;
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compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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interrupt-controller;
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interrupts-extended = <
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&cpu0_intc 11
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&cpu1_intc 11 &cpu1_intc 9
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&cpu2_intc 11 &cpu2_intc 9
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&cpu3_intc 11 &cpu3_intc 9
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&cpu4_intc 11 &cpu4_intc 9>;
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interrupts-extended = <&cpu0_intc 11>,
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<&cpu1_intc 11>, <&cpu1_intc 9>,
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<&cpu2_intc 11>, <&cpu2_intc 9>,
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<&cpu3_intc 11>, <&cpu3_intc 9>,
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<&cpu4_intc 11>, <&cpu4_intc 9>;
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reg = <0xc000000 0x4000000>;
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riscv,ndev = <10>;
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};
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@ -178,7 +178,6 @@ struct aic_irq_chip {
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struct irq_domain *hw_domain;
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struct irq_domain *ipi_domain;
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int nr_hw;
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int ipi_hwirq;
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};
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static DEFINE_PER_CPU(uint32_t, aic_fiq_unmasked);
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@ -4856,6 +4856,38 @@ static struct syscore_ops its_syscore_ops = {
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.resume = its_restore_enable,
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};
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static void __init __iomem *its_map_one(struct resource *res, int *err)
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{
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void __iomem *its_base;
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u32 val;
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its_base = ioremap(res->start, SZ_64K);
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if (!its_base) {
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pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
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*err = -ENOMEM;
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return NULL;
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}
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val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
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if (val != 0x30 && val != 0x40) {
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pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start);
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*err = -ENODEV;
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goto out_unmap;
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}
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*err = its_force_quiescent(its_base);
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if (*err) {
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pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start);
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goto out_unmap;
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}
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return its_base;
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out_unmap:
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iounmap(its_base);
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return NULL;
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}
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static int its_init_domain(struct fwnode_handle *handle, struct its_node *its)
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{
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struct irq_domain *inner_domain;
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@ -4963,29 +4995,14 @@ static int __init its_probe_one(struct resource *res,
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{
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struct its_node *its;
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void __iomem *its_base;
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u32 val, ctlr;
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u64 baser, tmp, typer;
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struct page *page;
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u32 ctlr;
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int err;
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its_base = ioremap(res->start, SZ_64K);
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if (!its_base) {
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pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
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return -ENOMEM;
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}
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val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
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if (val != 0x30 && val != 0x40) {
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pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start);
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err = -ENODEV;
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goto out_unmap;
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}
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err = its_force_quiescent(its_base);
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if (err) {
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pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start);
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goto out_unmap;
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}
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its_base = its_map_one(res, &err);
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if (!its_base)
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return err;
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pr_info("ITS %pR\n", res);
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@ -5241,13 +5258,31 @@ static int its_cpu_memreserve_lpi(unsigned int cpu)
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out:
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/* Last CPU being brought up gets to issue the cleanup */
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if (cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask))
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if (!IS_ENABLED(CONFIG_SMP) ||
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cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask))
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schedule_work(&rdist_memreserve_cpuhp_cleanup_work);
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gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE;
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return ret;
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}
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/* Mark all the BASER registers as invalid before they get reprogrammed */
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static int __init its_reset_one(struct resource *res)
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{
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void __iomem *its_base;
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int err, i;
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its_base = its_map_one(res, &err);
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if (!its_base)
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return err;
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for (i = 0; i < GITS_BASER_NR_REGS; i++)
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gits_write_baser(0, its_base + GITS_BASER + (i << 3));
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iounmap(its_base);
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return 0;
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}
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static const struct of_device_id its_device_id[] = {
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{ .compatible = "arm,gic-v3-its", },
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{},
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@ -5258,6 +5293,26 @@ static int __init its_of_probe(struct device_node *node)
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struct device_node *np;
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struct resource res;
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/*
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* Make sure *all* the ITS are reset before we probe any, as
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* they may be sharing memory. If any of the ITS fails to
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* reset, don't even try to go any further, as this could
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* result in something even worse.
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*/
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for (np = of_find_matching_node(node, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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int err;
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if (!of_device_is_available(np) ||
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!of_property_read_bool(np, "msi-controller") ||
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of_address_to_resource(np, 0, &res))
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continue;
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err = its_reset_one(&res);
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if (err)
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return err;
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}
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for (np = of_find_matching_node(node, its_device_id); np;
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np = of_find_matching_node(np, its_device_id)) {
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if (!of_device_is_available(np))
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@ -5420,11 +5475,35 @@ dom_err:
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return err;
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}
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static int __init its_acpi_reset(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_madt_generic_translator *its_entry;
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struct resource res;
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its_entry = (struct acpi_madt_generic_translator *)header;
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res = (struct resource) {
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.start = its_entry->base_address,
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.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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return its_reset_one(&res);
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}
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static void __init its_acpi_probe(void)
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{
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acpi_table_parse_srat_its();
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acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
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gic_acpi_parse_madt_its, 0);
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/*
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* Make sure *all* the ITS are reset before we probe any, as
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* they may be sharing memory. If any of the ITS fails to
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* reset, don't even try to go any further, as this could
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* result in something even worse.
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*/
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if (acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
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its_acpi_reset, 0) > 0)
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acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
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gic_acpi_parse_madt_its, 0);
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acpi_its_srat_maps_free();
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}
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#else
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@ -241,7 +241,7 @@ static int pch_msi_init(struct device_node *node,
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return 0;
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err_map:
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kfree(priv->msi_map);
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bitmap_free(priv->msi_map);
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err_priv:
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kfree(priv);
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return ret;
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@ -62,7 +62,7 @@ static struct irq_chip realtek_ictl_irq = {
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static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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{
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irq_set_chip_and_handler(hw, &realtek_ictl_irq, handle_level_irq);
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irq_set_chip_and_handler(irq, &realtek_ictl_irq, handle_level_irq);
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return 0;
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}
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@ -76,16 +76,20 @@ static void realtek_irq_dispatch(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct irq_domain *domain;
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unsigned int pending;
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unsigned long pending;
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unsigned int soc_int;
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chained_irq_enter(chip, desc);
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pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR));
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if (unlikely(!pending)) {
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spurious_interrupt();
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goto out;
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}
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domain = irq_desc_get_handler_data(desc);
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generic_handle_domain_irq(domain, __ffs(pending));
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for_each_set_bit(soc_int, &pending, 32)
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generic_handle_domain_irq(domain, soc_int);
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out:
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chained_irq_exit(chip, desc);
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@ -95,7 +99,8 @@ out:
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* SoC interrupts are cascaded to MIPS CPU interrupts according to the
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* interrupt-map in the device tree. Each SoC interrupt gets 4 bits for
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* the CPU interrupt in an Interrupt Routing Register. Max 32 SoC interrupts
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* thus go into 4 IRRs.
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* thus go into 4 IRRs. A routing value of '0' means the interrupt is left
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* disconnected. Routing values {1..15} connect to output lines {0..14}.
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*/
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static int __init map_interrupts(struct device_node *node, struct irq_domain *domain)
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{
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@ -134,7 +139,7 @@ static int __init map_interrupts(struct device_node *node, struct irq_domain *do
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of_node_put(cpu_ictl);
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cpu_int = be32_to_cpup(imap + 2);
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if (cpu_int > 7)
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if (cpu_int > 7 || cpu_int < 2)
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return -EINVAL;
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if (!(mips_irqs_set & BIT(cpu_int))) {
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@ -143,7 +148,8 @@ static int __init map_interrupts(struct device_node *node, struct irq_domain *do
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mips_irqs_set |= BIT(cpu_int);
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}
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regs[(soc_int * 4) / 32] |= cpu_int << (soc_int * 4) % 32;
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/* Use routing values (1..6) for CPU interrupts (2..7) */
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regs[(soc_int * 4) / 32] |= (cpu_int - 1) << (soc_int * 4) % 32;
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imap += 3;
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}
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