drm/amdgpu/gfx6: clean up spi configuration
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1551,17 +1551,15 @@ static u32 gfx_v6_0_get_cu_enabled(struct amdgpu_device *adev)
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}
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static void gfx_v6_0_setup_spi(struct amdgpu_device *adev,
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u32 se_num, u32 sh_per_se,
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u32 cu_per_sh)
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static void gfx_v6_0_setup_spi(struct amdgpu_device *adev)
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{
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int i, j, k;
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u32 data, mask;
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u32 active_cu = 0;
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mutex_lock(&adev->grbm_idx_mutex);
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for (i = 0; i < se_num; i++) {
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for (j = 0; j < sh_per_se; j++) {
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for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
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for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
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gfx_v6_0_select_se_sh(adev, i, j, 0xffffffff);
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data = RREG32(mmSPI_STATIC_THREAD_MGMT_3);
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active_cu = gfx_v6_0_get_cu_enabled(adev);
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@ -1732,9 +1730,7 @@ static void gfx_v6_0_gpu_init(struct amdgpu_device *adev)
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gfx_v6_0_setup_rb(adev);
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gfx_v6_0_setup_spi(adev, adev->gfx.config.max_shader_engines,
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adev->gfx.config.max_sh_per_se,
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adev->gfx.config.max_cu_per_sh);
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gfx_v6_0_setup_spi(adev);
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gfx_v6_0_get_cu_info(adev);
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