drm/tegra: Add tegra_dc_setup_clock() helper
This is a small helper that performs the basic steps required by all output drivers to prepare the display controller for use with a given encoder. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -1092,6 +1092,26 @@ static int tegra_crtc_setup_clk(struct drm_crtc *crtc,
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return 0;
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}
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int tegra_dc_setup_clock(struct tegra_dc *dc, struct clk *parent,
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unsigned long pclk, unsigned int div)
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{
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u32 value;
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int err;
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err = clk_set_parent(dc->clk, parent);
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if (err < 0) {
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dev_err(dc->dev, "failed to set parent clock: %d\n", err);
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return err;
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}
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DRM_DEBUG_KMS("rate: %lu, div: %u\n", clk_get_rate(dc->clk), div);
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value = SHIFT_CLK_DIVIDER(div) | PIXEL_CLK_DIVIDER_PCD1;
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tegra_dc_writel(dc, value, DC_DISP_DISP_CLOCK_CONTROL);
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return 0;
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}
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static int tegra_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted,
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@ -178,6 +178,8 @@ void tegra_dc_enable_vblank(struct tegra_dc *dc);
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void tegra_dc_disable_vblank(struct tegra_dc *dc);
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void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
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void tegra_dc_commit(struct tegra_dc *dc);
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int tegra_dc_setup_clock(struct tegra_dc *dc, struct clk *parent,
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unsigned long pclk, unsigned int div);
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struct tegra_output_ops {
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int (*enable)(struct tegra_output *output);
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