ata: remove deprecated use of pci api
Replace occurences of the pci api by appropriate call to the dma api. A simplified version of the semantic patch that finds this problem is as follows: (http://coccinelle.lip6.fr) @deprecated@ idexpression id; position p; @@ ( pci_dma_supported@p ( id, ...) | pci_alloc_consistent@p ( id, ...) ) @bad1@ idexpression id; position deprecated.p; @@ ...when != &id->dev when != pci_get_drvdata ( id ) when != pci_enable_device ( id ) ( pci_dma_supported@p ( id, ...) | pci_alloc_consistent@p ( id, ...) ) @depends on !bad1@ idexpression id; expression direction; position deprecated.p; @@ ( - pci_dma_supported@p ( id, + dma_supported ( &id->dev, ... + , GFP_ATOMIC ) | - pci_alloc_consistent@p ( id, + dma_alloc_coherent ( &id->dev, ... + , GFP_ATOMIC ) ) Signed-off-by: Quentin Lambert <lambert.quentin@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
parent
9a1e75e11a
commit
c54c719b55
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@ -181,10 +181,10 @@ static int acard_ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
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int rc;
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if (using_dac &&
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!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"64-bit DMA enable failed\n");
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@ -192,12 +192,12 @@ static int acard_ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"32-bit consistent DMA enable failed\n");
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@ -738,10 +738,10 @@ static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
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return 0;
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if (using_dac &&
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!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"64-bit DMA enable failed\n");
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@ -749,12 +749,12 @@ static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"32-bit consistent DMA enable failed\n");
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@ -3220,11 +3220,11 @@ void ata_pci_bmdma_init(struct ata_host *host)
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* ->sff_irq_clear method. Try to initialize bmdma_addr
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* regardless of dma masks.
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*/
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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ata_bmdma_nodma(host, "failed to set dma mask");
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if (!rc) {
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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ata_bmdma_nodma(host,
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"failed to set consistent dma mask");
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@ -475,11 +475,11 @@ static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
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atp867x_fixup(host);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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return rc;
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}
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@ -164,11 +164,11 @@ static int cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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return -ENODEV;
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}
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
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if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
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printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n");
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return -ENODEV;
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}
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if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
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if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
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printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n");
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return -ENODEV;
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}
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@ -221,10 +221,10 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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if (rc)
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return rc;
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host->iomap = pcim_iomap_table(pdev);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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@ -122,10 +122,10 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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return rc;
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host->iomap = pcim_iomap_table(dev);
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rc = pci_set_dma_mask(dev, ATA_DMA_MASK);
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rc = dma_set_mask(&dev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(dev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&dev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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pci_set_master(dev);
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@ -730,11 +730,11 @@ static int pdc2027x_init_one(struct pci_dev *pdev,
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return rc;
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host->iomap = pcim_iomap_table(pdev);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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@ -1029,10 +1029,10 @@ static int scc_host_init(struct ata_host *host)
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if (rc)
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return rc;
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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@ -374,10 +374,10 @@ static int sil680_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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host->iomap = pcim_iomap_table(pdev);
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/* Setup DMA masks */
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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pci_set_master(pdev);
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@ -593,12 +593,12 @@ static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base)
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{
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int rc;
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit consistent DMA enable failed\n");
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return rc;
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@ -856,13 +856,13 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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/* Set dma_mask. This devices doesn't support 64bit addressing. */
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit consistent DMA enable failed\n");
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return rc;
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@ -4320,10 +4320,10 @@ static int pci_go_64(struct pci_dev *pdev)
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{
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int rc;
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if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"64-bit DMA enable failed\n");
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@ -4331,12 +4331,12 @@ static int pci_go_64(struct pci_dev *pdev)
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"32-bit consistent DMA enable failed\n");
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@ -756,10 +756,10 @@ static int nv_adma_slave_config(struct scsi_device *sdev)
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blk_queue_bounce_limit(sdev1->request_queue,
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ATA_DMA_MASK);
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pci_set_dma_mask(pdev, ATA_DMA_MASK);
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dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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} else {
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/** This shouldn't fail as it was set to this value before */
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pci_set_dma_mask(pdev, pp->adma_dma_mask);
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dma_set_mask(&pdev->dev, pp->adma_dma_mask);
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if (sdev0)
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blk_queue_bounce_limit(sdev0->request_queue,
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pp->adma_dma_mask);
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@ -1133,10 +1133,10 @@ static int nv_adma_port_start(struct ata_port *ap)
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/* Ensure DMA mask is set to 32-bit before allocating legacy PRD and
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pad buffers */
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc)
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return rc;
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@ -1161,8 +1161,8 @@ static int nv_adma_port_start(struct ata_port *ap)
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These are allowed to fail since we store the value that ends up
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being used to set as the bounce limit in slave_config later if
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needed. */
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pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
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pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
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dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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pp->adma_dma_mask = *dev->dma_mask;
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mem = dmam_alloc_coherent(dev, NV_ADMA_PORT_PRIV_DMA_SZ,
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@ -1246,10 +1246,10 @@ static int pdc_ata_init_one(struct pci_dev *pdev,
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/* initialize adapter */
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pdc_host_init(host);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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@ -557,10 +557,10 @@ static int qs_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base)
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int rc, have_64bit_bus = (bus_info & QS_HPHY_64BIT);
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if (have_64bit_bus &&
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!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"64-bit DMA enable failed\n");
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@ -568,12 +568,12 @@ static int qs_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base)
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"32-bit consistent DMA enable failed\n");
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@ -770,10 +770,10 @@ static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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return rc;
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host->iomap = pcim_iomap_table(pdev);
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
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if (rc)
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return rc;
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@ -1312,10 +1312,10 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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host->iomap = iomap;
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/* configure and activate the device */
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if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
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if (rc) {
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"64-bit DMA enable failed\n");
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@ -1323,12 +1323,12 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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}
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} else {
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev, "32-bit DMA enable failed\n");
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return rc;
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (rc) {
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dev_err(&pdev->dev,
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"32-bit consistent DMA enable failed\n");
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@ -496,10 +496,10 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en
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ata_port_pbar_desc(ap, 5, offset, "port");
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}
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
|
||||
rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
|
|
@ -1476,10 +1476,10 @@ static int pdc_sata_init_one(struct pci_dev *pdev,
|
|||
}
|
||||
|
||||
/* configure and activate */
|
||||
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
|
||||
rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
|
||||
rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
|
|
@ -502,10 +502,10 @@ static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
|
|||
for (i = 0; i < host->n_ports; i++)
|
||||
vt6421_init_addrs(host->ports[i]);
|
||||
|
||||
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
|
||||
rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
|
||||
rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
|
|
@ -387,10 +387,10 @@ static int vsc_sata_init_one(struct pci_dev *pdev,
|
|||
/*
|
||||
* Use 32 bit DMA mask, because 64 bit address support is poor.
|
||||
*/
|
||||
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
|
Loading…
Reference in New Issue