Allwinner sunXi DT Additions for 3.14
Various DT related patches, but mostly: - Support for the Olimex A13-olinuxino-micro - Added the needed IP in the A31 for the HS timer support and SMP bringup - A10 and A20 RTC -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJStMQZAAoJEBx+YmzsjxAg2HkQAIm+PLqzY6kZrMi6MikFqJdB TI86zOkfWdN3pxPZAd1t/8r5Dx0LCnThWB0gu+ME8HN21rIs7UGvxlURlEFzkScH S9nN9+WKDGss58QIS/AE4e+sMkCTpdA1vB6ZDpNb/96Z5q/9fGQmIJeOqy8KIiqY QFeXBaqqI17qFGn6bZAOSmwkkZHQ35DB5ZlNzMiVpwv4qdPD8l7340XNHE991MXy maTJZUQU8DCwXSD1TeAULlgfdaM/F/K6msr6zwOTBGYEQpZev9a4zRUko9AAySae D0DisPntkkKsblGVouIg1sYDNe/OnkCiBZYBtZeqSAhH/EoAytR489BHS4fuN2Fm tuxBbEGn94kLm4IrzriYvnUQ3EodDUmAABkM/SsrcC0a4hnSEwy0Er3NscaVWT4n pycfBCyaaVv+0GZ4WrhjxiRPTac4BdckVvSGQshn6Anbw79H4yom8yp56RdEHeYo PsQv4s7vw4fiQ9TIqb8lDBk3rtGKaJqspih6nd+scCwTpcc9TzbhNrY5QfQUnMal b31XtF0P2oXdjILUrj3XvjNp2cyLZ6RD7+2BWdq/hqoZN+6N7RUYBzxSc1VeKVLx 7sAbNJh5cL2rKx9+uGbnFZEEzpYAULWkWQ1PMZYeuhgWU4THYBjidmJvWd6mcokp 4NXOqplYPExlxcfZoPFl =kYub -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-3.14' of https://github.com/mripard/linux into next/dt From Maxime Ripard: Allwinner sunXi DT Additions for 3.14 Various DT related patches, but mostly: - Support for the Olimex A13-olinuxino-micro - Added the needed IP in the A31 for the HS timer support and SMP bringup - A10 and A20 RTC * tag 'sunxi-dt-for-3.14' of https://github.com/mripard/linux: ARM: sun6i: dt: Add IP needed to bring up the additional cores ARM: dts: sun5i: Add new sun5i-a13-olinuxino-micro board ARM: sun6i: Add the reset controller to the DTSI ARM: sunxi: dt: add EMAC aliases ARM: dts: sun4i/sun7i: add RTC node Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
c53cb8d6a2
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@ -263,6 +263,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
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sun4i-a10-hackberry.dtb \
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sun5i-a10s-olinuxino-micro.dtb \
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sun5i-a13-olinuxino.dtb \
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sun5i-a13-olinuxino-micro.dtb \
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sun6i-a31-colombus.dtb \
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sun7i-a20-cubieboard2.dtb \
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sun7i-a20-cubietruck.dtb \
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@ -15,6 +15,10 @@
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/ {
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interrupt-parent = <&intc>;
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aliases {
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ethernet0 = &emac;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -266,6 +270,12 @@
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reg = <0x01c20c90 0x10>;
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};
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rtc: rtc@01c20d00 {
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compatible = "allwinner,sun4i-rtc";
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reg = <0x01c20d00 0x20>;
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interrupts = <24>;
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};
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sid: eeprom@01c23800 {
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compatible = "allwinner,sun4i-sid";
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reg = <0x01c23800 0x10>;
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@ -16,6 +16,10 @@
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/ {
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interrupt-parent = <&intc>;
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aliases {
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ethernet0 = &emac;
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};
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a8";
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@ -0,0 +1,68 @@
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/*
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* Copyright 2012 Maxime Ripard
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* Copyright 2013 Hans de Goede <hdegoede@redhat.com>
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "sun5i-a13.dtsi"
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/ {
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model = "Olimex A13-Olinuxino Micro";
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compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
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soc@01c00000 {
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pinctrl@01c20800 {
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led_pins_olinuxinom: led_pins@0 {
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allwinner,pins = "PG9";
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allwinner,function = "gpio_out";
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allwinner,drive = <1>;
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allwinner,pull = <0>;
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};
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};
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uart1: serial@01c28400 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins_b>;
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status = "okay";
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};
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i2c0: i2c@01c2ac00 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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status = "okay";
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};
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i2c1: i2c@01c2b000 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins_a>;
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status = "okay";
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};
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i2c2: i2c@01c2b400 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins_a>;
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status = "okay";
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins_olinuxinom>;
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power {
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label = "a13-olinuxino-micro:green:power";
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gpios = <&pio 6 9 0>;
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default-state = "on";
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};
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};
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};
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@ -209,6 +209,24 @@
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};
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};
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ahb1_rst: reset@01c202c0 {
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#reset-cells = <1>;
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compatible = "allwinner,sun6i-a31-ahb1-reset";
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reg = <0x01c202c0 0xc>;
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};
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apb1_rst: reset@01c202d0 {
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#reset-cells = <1>;
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compatible = "allwinner,sun6i-a31-clock-reset";
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reg = <0x01c202d0 0x4>;
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};
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apb2_rst: reset@01c202d8 {
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#reset-cells = <1>;
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compatible = "allwinner,sun6i-a31-clock-reset";
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reg = <0x01c202d8 0x4>;
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};
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timer@01c20c00 {
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compatible = "allwinner,sun4i-timer";
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reg = <0x01c20c00 0xa0>;
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@ -232,6 +250,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 16>;
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resets = <&apb2_rst 16>;
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status = "disabled";
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};
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@ -242,6 +261,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 17>;
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resets = <&apb2_rst 17>;
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status = "disabled";
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};
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@ -252,6 +272,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 18>;
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resets = <&apb2_rst 18>;
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status = "disabled";
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};
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@ -262,6 +283,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 19>;
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resets = <&apb2_rst 19>;
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status = "disabled";
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};
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@ -272,6 +294,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 20>;
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resets = <&apb2_rst 20>;
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status = "disabled";
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};
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@ -282,6 +305,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 21>;
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resets = <&apb2_rst 21>;
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status = "disabled";
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};
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@ -295,5 +319,15 @@
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#interrupt-cells = <3>;
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interrupts = <1 9 0xf04>;
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};
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cpucfg@01f01c00 {
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compatible = "allwinner,sun6i-a31-cpuconfig";
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reg = <0x01f01c00 0x300>;
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};
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prcm@01f01c00 {
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compatible = "allwinner,sun6i-a31-prcm";
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reg = <0x01f01400 0x200>;
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};
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};
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};
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@ -16,6 +16,10 @@
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/ {
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interrupt-parent = <&gic>;
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aliases {
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ethernet0 = &emac;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -265,6 +269,12 @@
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reg = <0x01c20c90 0x10>;
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};
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rtc: rtc@01c20d00 {
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compatible = "allwinner,sun7i-a20-rtc";
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reg = <0x01c20d00 0x20>;
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interrupts = <0 24 1>;
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};
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sid: eeprom@01c23800 {
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compatible = "allwinner,sun7i-a20-sid";
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reg = <0x01c23800 0x200>;
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