[media] media: Driver for Toshiba et8ek8 5MP sensor
Add driver for et8ek8 sensor, found in Nokia N900 main camera. Can be used for taking photos in 2.5MP resolution with fcam-dev. Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Pavel Machek
Mauro Carvalho Chehab
parent
ded9a92a62
commit
c5254e72b8
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@ -668,6 +668,7 @@ config VIDEO_S5K5BAF
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camera sensor with an embedded SoC image signal processor.
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source "drivers/media/i2c/smiapp/Kconfig"
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source "drivers/media/i2c/et8ek8/Kconfig"
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config VIDEO_S5C73M3
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tristate "Samsung S5C73M3 sensor support"
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@ -2,6 +2,7 @@ msp3400-objs := msp3400-driver.o msp3400-kthreads.o
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obj-$(CONFIG_VIDEO_MSP3400) += msp3400.o
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obj-$(CONFIG_VIDEO_SMIAPP) += smiapp/
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obj-$(CONFIG_VIDEO_ET8EK8) += et8ek8/
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obj-$(CONFIG_VIDEO_CX25840) += cx25840/
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obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/
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obj-y += soc_camera/
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@ -0,0 +1,6 @@
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config VIDEO_ET8EK8
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tristate "ET8EK8 camera sensor support"
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depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
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---help---
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This is a driver for the Toshiba ET8EK8 5 MP camera sensor.
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It is used for example in Nokia N900 (RX-51).
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@ -0,0 +1,2 @@
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et8ek8-objs += et8ek8_mode.o et8ek8_driver.o
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obj-$(CONFIG_VIDEO_ET8EK8) += et8ek8.o
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,587 @@
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/*
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* et8ek8_mode.c
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*
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* Copyright (C) 2008 Nokia Corporation
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*
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* Contact: Sakari Ailus <sakari.ailus@iki.fi>
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* Tuukka Toivonen <tuukkat76@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include "et8ek8_reg.h"
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/*
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* Stingray sensor mode settings for Scooby
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*/
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/* Mode1_poweron_Mode2_16VGA_2592x1968_12.07fps */
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static struct et8ek8_reglist mode1_poweron_mode2_16vga_2592x1968_12_07fps = {
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/* (without the +1)
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* SPCK = 80 MHz
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* CCP2 = 640 MHz
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* VCO = 640 MHz
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* VCOUNT = 84 (2016)
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* HCOUNT = 137 (3288)
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* CKREF_DIV = 2
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* CKVAR_DIV = 200
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* VCO_DIV = 0
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* SPCK_DIV = 7
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* MRCK_DIV = 7
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* LVDSCK_DIV = 0
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*/
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.type = ET8EK8_REGLIST_POWERON,
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.mode = {
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.sensor_width = 2592,
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.sensor_height = 1968,
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.sensor_window_origin_x = 0,
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.sensor_window_origin_y = 0,
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.sensor_window_width = 2592,
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.sensor_window_height = 1968,
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.width = 3288,
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.height = 2016,
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.window_origin_x = 0,
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.window_origin_y = 0,
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.window_width = 2592,
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.window_height = 1968,
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.pixel_clock = 80000000,
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.ext_clock = 9600000,
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.timeperframe = {
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.numerator = 100,
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.denominator = 1207
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},
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.max_exp = 2012,
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/* .max_gain = 0, */
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.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
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.sensitivity = 65536
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},
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.regs = {
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/* Need to set firstly */
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{ ET8EK8_REG_8BIT, 0x126C, 0xCC },
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/* Strobe and Data of CCP2 delay are minimized. */
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{ ET8EK8_REG_8BIT, 0x1269, 0x00 },
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/* Refined value of Min H_COUNT */
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{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
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/* Frequency of SPCK setting (SPCK=MRCK) */
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{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
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{ ET8EK8_REG_8BIT, 0x1241, 0x94 },
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{ ET8EK8_REG_8BIT, 0x1242, 0x02 },
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{ ET8EK8_REG_8BIT, 0x124B, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1255, 0xFF },
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{ ET8EK8_REG_8BIT, 0x1256, 0x9F },
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{ ET8EK8_REG_8BIT, 0x1258, 0x00 },
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/* From parallel out to serial out */
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{ ET8EK8_REG_8BIT, 0x125D, 0x88 },
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/* From w/ embeded data to w/o embeded data */
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{ ET8EK8_REG_8BIT, 0x125E, 0xC0 },
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/* CCP2 out is from STOP to ACTIVE */
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{ ET8EK8_REG_8BIT, 0x1263, 0x98 },
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{ ET8EK8_REG_8BIT, 0x1268, 0xC6 },
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{ ET8EK8_REG_8BIT, 0x1434, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1163, 0x44 },
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{ ET8EK8_REG_8BIT, 0x1166, 0x29 },
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{ ET8EK8_REG_8BIT, 0x1140, 0x02 },
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{ ET8EK8_REG_8BIT, 0x1011, 0x24 },
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{ ET8EK8_REG_8BIT, 0x1151, 0x80 },
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{ ET8EK8_REG_8BIT, 0x1152, 0x23 },
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/* Initial setting for improvement2 of lower frequency noise */
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{ ET8EK8_REG_8BIT, 0x1014, 0x05 },
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{ ET8EK8_REG_8BIT, 0x1033, 0x06 },
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{ ET8EK8_REG_8BIT, 0x1034, 0x79 },
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{ ET8EK8_REG_8BIT, 0x1423, 0x3F },
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{ ET8EK8_REG_8BIT, 0x1424, 0x3F },
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{ ET8EK8_REG_8BIT, 0x1426, 0x00 },
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/* Switch of Preset-White-balance (0d:disable / 1d:enable) */
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{ ET8EK8_REG_8BIT, 0x1439, 0x00 },
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/* Switch of blemish correction (0d:disable / 1d:enable) */
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{ ET8EK8_REG_8BIT, 0x161F, 0x60 },
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/* Switch of auto noise correction (0d:disable / 1d:enable) */
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{ ET8EK8_REG_8BIT, 0x1634, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1646, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1648, 0x00 },
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{ ET8EK8_REG_8BIT, 0x113E, 0x01 },
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{ ET8EK8_REG_8BIT, 0x113F, 0x22 },
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{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
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{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
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{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
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{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
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{ ET8EK8_REG_8BIT, 0x121B, 0x64 },
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{ ET8EK8_REG_8BIT, 0x121D, 0x64 },
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{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
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{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
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{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/ */
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{ ET8EK8_REG_TERM, 0, 0}
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}
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};
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/* Mode1_16VGA_2592x1968_13.12fps_DPCM10-8 */
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static struct et8ek8_reglist mode1_16vga_2592x1968_13_12fps_dpcm10_8 = {
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/* (without the +1)
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* SPCK = 80 MHz
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* CCP2 = 560 MHz
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* VCO = 560 MHz
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* VCOUNT = 84 (2016)
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* HCOUNT = 128 (3072)
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* CKREF_DIV = 2
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* CKVAR_DIV = 175
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* VCO_DIV = 0
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* SPCK_DIV = 6
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* MRCK_DIV = 7
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* LVDSCK_DIV = 0
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*/
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.type = ET8EK8_REGLIST_MODE,
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.mode = {
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.sensor_width = 2592,
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.sensor_height = 1968,
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.sensor_window_origin_x = 0,
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.sensor_window_origin_y = 0,
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.sensor_window_width = 2592,
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.sensor_window_height = 1968,
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.width = 3072,
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.height = 2016,
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.window_origin_x = 0,
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.window_origin_y = 0,
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.window_width = 2592,
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.window_height = 1968,
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.pixel_clock = 80000000,
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.ext_clock = 9600000,
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.timeperframe = {
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.numerator = 100,
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.denominator = 1292
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},
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.max_exp = 2012,
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/* .max_gain = 0, */
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.bus_format = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
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.sensitivity = 65536
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},
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.regs = {
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{ ET8EK8_REG_8BIT, 0x1239, 0x57 },
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{ ET8EK8_REG_8BIT, 0x1238, 0x82 },
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{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
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{ ET8EK8_REG_8BIT, 0x123A, 0x06 },
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{ ET8EK8_REG_8BIT, 0x121B, 0x64 },
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{ ET8EK8_REG_8BIT, 0x121D, 0x64 },
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{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1220, 0x80 }, /* <-changed to v14 7E->80 */
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{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
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{ ET8EK8_REG_8BIT, 0x125D, 0x83 }, /* CCP_LVDS_MODE/ */
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{ ET8EK8_REG_TERM, 0, 0}
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}
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};
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/* Mode3_4VGA_1296x984_29.99fps_DPCM10-8 */
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static struct et8ek8_reglist mode3_4vga_1296x984_29_99fps_dpcm10_8 = {
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/* (without the +1)
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* SPCK = 96.5333333333333 MHz
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* CCP2 = 579.2 MHz
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* VCO = 579.2 MHz
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* VCOUNT = 84 (2016)
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* HCOUNT = 133 (3192)
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* CKREF_DIV = 2
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* CKVAR_DIV = 181
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* VCO_DIV = 0
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* SPCK_DIV = 5
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* MRCK_DIV = 7
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* LVDSCK_DIV = 0
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*/
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.type = ET8EK8_REGLIST_MODE,
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.mode = {
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.sensor_width = 2592,
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.sensor_height = 1968,
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.sensor_window_origin_x = 0,
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.sensor_window_origin_y = 0,
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.sensor_window_width = 2592,
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.sensor_window_height = 1968,
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.width = 3192,
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.height = 1008,
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.window_origin_x = 0,
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.window_origin_y = 0,
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.window_width = 1296,
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.window_height = 984,
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.pixel_clock = 96533333,
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.ext_clock = 9600000,
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.timeperframe = {
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.numerator = 100,
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.denominator = 3000
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},
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.max_exp = 1004,
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/* .max_gain = 0, */
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.bus_format = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
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.sensitivity = 65536
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},
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.regs = {
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{ ET8EK8_REG_8BIT, 0x1239, 0x5A },
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{ ET8EK8_REG_8BIT, 0x1238, 0x82 },
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{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
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{ ET8EK8_REG_8BIT, 0x123A, 0x05 },
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{ ET8EK8_REG_8BIT, 0x121B, 0x63 },
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{ ET8EK8_REG_8BIT, 0x1220, 0x85 },
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{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
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{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
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{ ET8EK8_REG_8BIT, 0x121D, 0x63 },
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{ ET8EK8_REG_8BIT, 0x125D, 0x83 }, /* CCP_LVDS_MODE/ */
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{ ET8EK8_REG_TERM, 0, 0}
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}
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};
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/* Mode4_SVGA_864x656_29.88fps */
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static struct et8ek8_reglist mode4_svga_864x656_29_88fps = {
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/* (without the +1)
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* SPCK = 80 MHz
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* CCP2 = 320 MHz
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* VCO = 640 MHz
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* VCOUNT = 84 (2016)
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* HCOUNT = 166 (3984)
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* CKREF_DIV = 2
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* CKVAR_DIV = 200
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* VCO_DIV = 0
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* SPCK_DIV = 7
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* MRCK_DIV = 7
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* LVDSCK_DIV = 1
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*/
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.type = ET8EK8_REGLIST_MODE,
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.mode = {
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.sensor_width = 2592,
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.sensor_height = 1968,
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.sensor_window_origin_x = 0,
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.sensor_window_origin_y = 0,
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.sensor_window_width = 2592,
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.sensor_window_height = 1968,
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.width = 3984,
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.height = 672,
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.window_origin_x = 0,
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.window_origin_y = 0,
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.window_width = 864,
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.window_height = 656,
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.pixel_clock = 80000000,
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.ext_clock = 9600000,
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.timeperframe = {
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.numerator = 100,
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.denominator = 2988
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},
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.max_exp = 668,
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/* .max_gain = 0, */
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.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
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.sensitivity = 65536
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},
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.regs = {
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{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
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{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
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{ ET8EK8_REG_8BIT, 0x123B, 0x71 },
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{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
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{ ET8EK8_REG_8BIT, 0x121B, 0x62 },
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{ ET8EK8_REG_8BIT, 0x121D, 0x62 },
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{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1220, 0xA6 },
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{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
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{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/ */
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{ ET8EK8_REG_TERM, 0, 0}
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}
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};
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/* Mode5_VGA_648x492_29.93fps */
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static struct et8ek8_reglist mode5_vga_648x492_29_93fps = {
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/* (without the +1)
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* SPCK = 80 MHz
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* CCP2 = 320 MHz
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* VCO = 640 MHz
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* VCOUNT = 84 (2016)
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* HCOUNT = 221 (5304)
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* CKREF_DIV = 2
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* CKVAR_DIV = 200
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* VCO_DIV = 0
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* SPCK_DIV = 7
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* MRCK_DIV = 7
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* LVDSCK_DIV = 1
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*/
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.type = ET8EK8_REGLIST_MODE,
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.mode = {
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.sensor_width = 2592,
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.sensor_height = 1968,
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.sensor_window_origin_x = 0,
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.sensor_window_origin_y = 0,
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.sensor_window_width = 2592,
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.sensor_window_height = 1968,
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.width = 5304,
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.height = 504,
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.window_origin_x = 0,
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.window_origin_y = 0,
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.window_width = 648,
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.window_height = 492,
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.pixel_clock = 80000000,
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.ext_clock = 9600000,
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.timeperframe = {
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.numerator = 100,
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.denominator = 2993
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},
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.max_exp = 500,
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/* .max_gain = 0, */
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.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
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.sensitivity = 65536
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},
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.regs = {
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{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
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{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
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{ ET8EK8_REG_8BIT, 0x123B, 0x71 },
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{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
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{ ET8EK8_REG_8BIT, 0x121B, 0x61 },
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{ ET8EK8_REG_8BIT, 0x121D, 0x61 },
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{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1220, 0xDD },
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{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
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{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
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{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/ */
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{ ET8EK8_REG_TERM, 0, 0}
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}
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};
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/* Mode2_16VGA_2592x1968_3.99fps */
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||||
static struct et8ek8_reglist mode2_16vga_2592x1968_3_99fps = {
|
||||
/* (without the +1)
|
||||
* SPCK = 80 MHz
|
||||
* CCP2 = 640 MHz
|
||||
* VCO = 640 MHz
|
||||
* VCOUNT = 254 (6096)
|
||||
* HCOUNT = 137 (3288)
|
||||
* CKREF_DIV = 2
|
||||
* CKVAR_DIV = 200
|
||||
* VCO_DIV = 0
|
||||
* SPCK_DIV = 7
|
||||
* MRCK_DIV = 7
|
||||
* LVDSCK_DIV = 0
|
||||
*/
|
||||
.type = ET8EK8_REGLIST_MODE,
|
||||
.mode = {
|
||||
.sensor_width = 2592,
|
||||
.sensor_height = 1968,
|
||||
.sensor_window_origin_x = 0,
|
||||
.sensor_window_origin_y = 0,
|
||||
.sensor_window_width = 2592,
|
||||
.sensor_window_height = 1968,
|
||||
.width = 3288,
|
||||
.height = 6096,
|
||||
.window_origin_x = 0,
|
||||
.window_origin_y = 0,
|
||||
.window_width = 2592,
|
||||
.window_height = 1968,
|
||||
.pixel_clock = 80000000,
|
||||
.ext_clock = 9600000,
|
||||
.timeperframe = {
|
||||
.numerator = 100,
|
||||
.denominator = 399
|
||||
},
|
||||
.max_exp = 6092,
|
||||
/* .max_gain = 0, */
|
||||
.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
|
||||
.sensitivity = 65536
|
||||
},
|
||||
.regs = {
|
||||
{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
|
||||
{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
|
||||
{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
|
||||
{ ET8EK8_REG_8BIT, 0x123A, 0x07 },
|
||||
{ ET8EK8_REG_8BIT, 0x121B, 0x64 },
|
||||
{ ET8EK8_REG_8BIT, 0x121D, 0x64 },
|
||||
{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
|
||||
{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1222, 0xFE },
|
||||
{ ET8EK8_REG_TERM, 0, 0}
|
||||
}
|
||||
};
|
||||
|
||||
/* Mode_648x492_5fps */
|
||||
static struct et8ek8_reglist mode_648x492_5fps = {
|
||||
/* (without the +1)
|
||||
* SPCK = 13.3333333333333 MHz
|
||||
* CCP2 = 53.3333333333333 MHz
|
||||
* VCO = 640 MHz
|
||||
* VCOUNT = 84 (2016)
|
||||
* HCOUNT = 221 (5304)
|
||||
* CKREF_DIV = 2
|
||||
* CKVAR_DIV = 200
|
||||
* VCO_DIV = 5
|
||||
* SPCK_DIV = 7
|
||||
* MRCK_DIV = 7
|
||||
* LVDSCK_DIV = 1
|
||||
*/
|
||||
.type = ET8EK8_REGLIST_MODE,
|
||||
.mode = {
|
||||
.sensor_width = 2592,
|
||||
.sensor_height = 1968,
|
||||
.sensor_window_origin_x = 0,
|
||||
.sensor_window_origin_y = 0,
|
||||
.sensor_window_width = 2592,
|
||||
.sensor_window_height = 1968,
|
||||
.width = 5304,
|
||||
.height = 504,
|
||||
.window_origin_x = 0,
|
||||
.window_origin_y = 0,
|
||||
.window_width = 648,
|
||||
.window_height = 492,
|
||||
.pixel_clock = 13333333,
|
||||
.ext_clock = 9600000,
|
||||
.timeperframe = {
|
||||
.numerator = 100,
|
||||
.denominator = 499
|
||||
},
|
||||
.max_exp = 500,
|
||||
/* .max_gain = 0, */
|
||||
.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
|
||||
.sensitivity = 65536
|
||||
},
|
||||
.regs = {
|
||||
{ ET8EK8_REG_8BIT, 0x1239, 0x64 },
|
||||
{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
|
||||
{ ET8EK8_REG_8BIT, 0x123B, 0x71 },
|
||||
{ ET8EK8_REG_8BIT, 0x123A, 0x57 },
|
||||
{ ET8EK8_REG_8BIT, 0x121B, 0x61 },
|
||||
{ ET8EK8_REG_8BIT, 0x121D, 0x61 },
|
||||
{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1220, 0xDD },
|
||||
{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1222, 0x54 },
|
||||
{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/ */
|
||||
{ ET8EK8_REG_TERM, 0, 0}
|
||||
}
|
||||
};
|
||||
|
||||
/* Mode3_4VGA_1296x984_5fps */
|
||||
static struct et8ek8_reglist mode3_4vga_1296x984_5fps = {
|
||||
/* (without the +1)
|
||||
* SPCK = 49.4 MHz
|
||||
* CCP2 = 395.2 MHz
|
||||
* VCO = 790.4 MHz
|
||||
* VCOUNT = 250 (6000)
|
||||
* HCOUNT = 137 (3288)
|
||||
* CKREF_DIV = 2
|
||||
* CKVAR_DIV = 247
|
||||
* VCO_DIV = 1
|
||||
* SPCK_DIV = 7
|
||||
* MRCK_DIV = 7
|
||||
* LVDSCK_DIV = 0
|
||||
*/
|
||||
.type = ET8EK8_REGLIST_MODE,
|
||||
.mode = {
|
||||
.sensor_width = 2592,
|
||||
.sensor_height = 1968,
|
||||
.sensor_window_origin_x = 0,
|
||||
.sensor_window_origin_y = 0,
|
||||
.sensor_window_width = 2592,
|
||||
.sensor_window_height = 1968,
|
||||
.width = 3288,
|
||||
.height = 3000,
|
||||
.window_origin_x = 0,
|
||||
.window_origin_y = 0,
|
||||
.window_width = 1296,
|
||||
.window_height = 984,
|
||||
.pixel_clock = 49400000,
|
||||
.ext_clock = 9600000,
|
||||
.timeperframe = {
|
||||
.numerator = 100,
|
||||
.denominator = 501
|
||||
},
|
||||
.max_exp = 2996,
|
||||
/* .max_gain = 0, */
|
||||
.bus_format = MEDIA_BUS_FMT_SGRBG10_1X10,
|
||||
.sensitivity = 65536
|
||||
},
|
||||
.regs = {
|
||||
{ ET8EK8_REG_8BIT, 0x1239, 0x7B },
|
||||
{ ET8EK8_REG_8BIT, 0x1238, 0x82 },
|
||||
{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
|
||||
{ ET8EK8_REG_8BIT, 0x123A, 0x17 },
|
||||
{ ET8EK8_REG_8BIT, 0x121B, 0x63 },
|
||||
{ ET8EK8_REG_8BIT, 0x121D, 0x63 },
|
||||
{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1220, 0x89 },
|
||||
{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1222, 0xFA },
|
||||
{ ET8EK8_REG_8BIT, 0x125D, 0x88 }, /* CCP_LVDS_MODE/ */
|
||||
{ ET8EK8_REG_TERM, 0, 0}
|
||||
}
|
||||
};
|
||||
|
||||
/* Mode_4VGA_1296x984_25fps_DPCM10-8 */
|
||||
static struct et8ek8_reglist mode_4vga_1296x984_25fps_dpcm10_8 = {
|
||||
/* (without the +1)
|
||||
* SPCK = 84.2666666666667 MHz
|
||||
* CCP2 = 505.6 MHz
|
||||
* VCO = 505.6 MHz
|
||||
* VCOUNT = 88 (2112)
|
||||
* HCOUNT = 133 (3192)
|
||||
* CKREF_DIV = 2
|
||||
* CKVAR_DIV = 158
|
||||
* VCO_DIV = 0
|
||||
* SPCK_DIV = 5
|
||||
* MRCK_DIV = 7
|
||||
* LVDSCK_DIV = 0
|
||||
*/
|
||||
.type = ET8EK8_REGLIST_MODE,
|
||||
.mode = {
|
||||
.sensor_width = 2592,
|
||||
.sensor_height = 1968,
|
||||
.sensor_window_origin_x = 0,
|
||||
.sensor_window_origin_y = 0,
|
||||
.sensor_window_width = 2592,
|
||||
.sensor_window_height = 1968,
|
||||
.width = 3192,
|
||||
.height = 1056,
|
||||
.window_origin_x = 0,
|
||||
.window_origin_y = 0,
|
||||
.window_width = 1296,
|
||||
.window_height = 984,
|
||||
.pixel_clock = 84266667,
|
||||
.ext_clock = 9600000,
|
||||
.timeperframe = {
|
||||
.numerator = 100,
|
||||
.denominator = 2500
|
||||
},
|
||||
.max_exp = 1052,
|
||||
/* .max_gain = 0, */
|
||||
.bus_format = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8,
|
||||
.sensitivity = 65536
|
||||
},
|
||||
.regs = {
|
||||
{ ET8EK8_REG_8BIT, 0x1239, 0x4F },
|
||||
{ ET8EK8_REG_8BIT, 0x1238, 0x02 },
|
||||
{ ET8EK8_REG_8BIT, 0x123B, 0x70 },
|
||||
{ ET8EK8_REG_8BIT, 0x123A, 0x05 },
|
||||
{ ET8EK8_REG_8BIT, 0x121B, 0x63 },
|
||||
{ ET8EK8_REG_8BIT, 0x1220, 0x85 },
|
||||
{ ET8EK8_REG_8BIT, 0x1221, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x1222, 0x58 },
|
||||
{ ET8EK8_REG_8BIT, 0x1223, 0x00 },
|
||||
{ ET8EK8_REG_8BIT, 0x121D, 0x63 },
|
||||
{ ET8EK8_REG_8BIT, 0x125D, 0x83 },
|
||||
{ ET8EK8_REG_TERM, 0, 0}
|
||||
}
|
||||
};
|
||||
|
||||
struct et8ek8_meta_reglist meta_reglist = {
|
||||
.version = "V14 03-June-2008",
|
||||
.reglist = {
|
||||
{ .ptr = &mode1_poweron_mode2_16vga_2592x1968_12_07fps },
|
||||
{ .ptr = &mode1_16vga_2592x1968_13_12fps_dpcm10_8 },
|
||||
{ .ptr = &mode3_4vga_1296x984_29_99fps_dpcm10_8 },
|
||||
{ .ptr = &mode4_svga_864x656_29_88fps },
|
||||
{ .ptr = &mode5_vga_648x492_29_93fps },
|
||||
{ .ptr = &mode2_16vga_2592x1968_3_99fps },
|
||||
{ .ptr = &mode_648x492_5fps },
|
||||
{ .ptr = &mode3_4vga_1296x984_5fps },
|
||||
{ .ptr = &mode_4vga_1296x984_25fps_dpcm10_8 },
|
||||
{ .ptr = NULL }
|
||||
}
|
||||
};
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
/*
|
||||
* et8ek8_reg.h
|
||||
*
|
||||
* Copyright (C) 2008 Nokia Corporation
|
||||
*
|
||||
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
|
||||
* Tuukka Toivonen <tuukkat76@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef ET8EK8REGS_H
|
||||
#define ET8EK8REGS_H
|
||||
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/v4l2-subdev.h>
|
||||
|
||||
struct v4l2_mbus_framefmt;
|
||||
struct v4l2_subdev_pad_mbus_code_enum;
|
||||
|
||||
struct et8ek8_mode {
|
||||
/* Physical sensor resolution and current image window */
|
||||
u16 sensor_width;
|
||||
u16 sensor_height;
|
||||
u16 sensor_window_origin_x;
|
||||
u16 sensor_window_origin_y;
|
||||
u16 sensor_window_width;
|
||||
u16 sensor_window_height;
|
||||
|
||||
/* Image data coming from sensor (after scaling) */
|
||||
u16 width;
|
||||
u16 height;
|
||||
u16 window_origin_x;
|
||||
u16 window_origin_y;
|
||||
u16 window_width;
|
||||
u16 window_height;
|
||||
|
||||
u32 pixel_clock; /* in Hz */
|
||||
u32 ext_clock; /* in Hz */
|
||||
struct v4l2_fract timeperframe;
|
||||
u32 max_exp; /* Maximum exposure value */
|
||||
u32 bus_format; /* MEDIA_BUS_FMT_ */
|
||||
u32 sensitivity; /* 16.16 fixed point */
|
||||
};
|
||||
|
||||
#define ET8EK8_REG_8BIT 1
|
||||
#define ET8EK8_REG_16BIT 2
|
||||
#define ET8EK8_REG_DELAY 100
|
||||
#define ET8EK8_REG_TERM 0xff
|
||||
struct et8ek8_reg {
|
||||
u16 type;
|
||||
u16 reg; /* 16-bit offset */
|
||||
u32 val; /* 8/16/32-bit value */
|
||||
};
|
||||
|
||||
/* Possible struct smia_reglist types. */
|
||||
#define ET8EK8_REGLIST_STANDBY 0
|
||||
#define ET8EK8_REGLIST_POWERON 1
|
||||
#define ET8EK8_REGLIST_RESUME 2
|
||||
#define ET8EK8_REGLIST_STREAMON 3
|
||||
#define ET8EK8_REGLIST_STREAMOFF 4
|
||||
#define ET8EK8_REGLIST_DISABLED 5
|
||||
|
||||
#define ET8EK8_REGLIST_MODE 10
|
||||
|
||||
#define ET8EK8_REGLIST_LSC_ENABLE 100
|
||||
#define ET8EK8_REGLIST_LSC_DISABLE 101
|
||||
#define ET8EK8_REGLIST_ANR_ENABLE 102
|
||||
#define ET8EK8_REGLIST_ANR_DISABLE 103
|
||||
|
||||
struct et8ek8_reglist {
|
||||
u32 type;
|
||||
struct et8ek8_mode mode;
|
||||
struct et8ek8_reg regs[];
|
||||
};
|
||||
|
||||
#define ET8EK8_MAX_LEN 32
|
||||
struct et8ek8_meta_reglist {
|
||||
char version[ET8EK8_MAX_LEN];
|
||||
union {
|
||||
struct et8ek8_reglist *ptr;
|
||||
} reglist[];
|
||||
};
|
||||
|
||||
extern struct et8ek8_meta_reglist meta_reglist;
|
||||
|
||||
#endif /* ET8EK8REGS */
|
||||
Loading…
Reference in New Issue