ARM: imx: assert SCC gate stays enabled
The SCC clock is needed in internal boot mode and so must keep enabled.
This same issue was fixed for the pre-common-clk code in commit
3d6e614
(mx35: Fix boot ROM hang in internal boot mode)
Cc: John Ogness <jogness@linutronix.de>
Cc: Hans J. Koch <hjk@hansjkoch.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
396c89b327
commit
c520c921ea
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@ -201,7 +201,6 @@ int __init mx35_clocks_init()
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pr_err("i.MX35 clk %d: register failed with %ld\n",
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i, PTR_ERR(clk[i]));
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clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
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clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
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clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
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@ -264,6 +263,14 @@ int __init mx35_clocks_init()
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clk_prepare_enable(clk[iim_gate]);
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clk_prepare_enable(clk[emi_gate]);
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/*
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* SCC is needed to boot via mmc after a watchdog reset. The clock code
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* before conversion to common clk also enabled UART1 (which isn't
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* handled here and not needed for mmc) and IIM (which is enabled
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* unconditionally above).
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*/
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clk_prepare_enable(clk[scc_gate]);
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imx_print_silicon_rev("i.MX35", mx35_revision());
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#ifdef CONFIG_MXC_USE_EPIT
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