ARM: OMAP3: PRM: move PRM init code from PM core to the driver
Helps to isolate the PRM driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
This commit is contained in:
Tero Kristo
parent
6bdc4b44b3
commit
c5180a2b3e
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@ -376,79 +376,10 @@ static void __init omap3_d2d_idle(void)
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static void __init prcm_setup_regs(void)
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{
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u32 omap3630_en_uart4_mask = cpu_is_omap3630() ?
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OMAP3630_EN_UART4_MASK : 0;
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u32 omap3630_grpsel_uart4_mask = cpu_is_omap3630() ?
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OMAP3630_GRPSEL_UART4_MASK : 0;
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/* XXX This should be handled by hwmod code or SCM init code */
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omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG);
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/*
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* Enable control of expternal oscillator through
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* sys_clkreq. In the long run clock framework should
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* take care of this.
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*/
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omap2_prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK,
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1 << OMAP_AUTOEXTCLKMODE_SHIFT,
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OMAP3430_GR_MOD,
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OMAP3_PRM_CLKSRC_CTRL_OFFSET);
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/* setup wakup source */
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omap2_prm_write_mod_reg(OMAP3430_EN_IO_MASK | OMAP3430_EN_GPIO1_MASK |
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OMAP3430_EN_GPT1_MASK | OMAP3430_EN_GPT12_MASK,
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WKUP_MOD, PM_WKEN);
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/* No need to write EN_IO, that is always enabled */
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omap2_prm_write_mod_reg(OMAP3430_GRPSEL_GPIO1_MASK |
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OMAP3430_GRPSEL_GPT1_MASK |
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OMAP3430_GRPSEL_GPT12_MASK,
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WKUP_MOD, OMAP3430_PM_MPUGRPSEL);
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/* Enable PM_WKEN to support DSS LPR */
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omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK,
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OMAP3430_DSS_MOD, PM_WKEN);
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/* Enable wakeups in PER */
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omap2_prm_write_mod_reg(omap3630_en_uart4_mask |
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OMAP3430_EN_GPIO2_MASK | OMAP3430_EN_GPIO3_MASK |
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OMAP3430_EN_GPIO4_MASK | OMAP3430_EN_GPIO5_MASK |
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OMAP3430_EN_GPIO6_MASK | OMAP3430_EN_UART3_MASK |
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OMAP3430_EN_MCBSP2_MASK | OMAP3430_EN_MCBSP3_MASK |
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OMAP3430_EN_MCBSP4_MASK,
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OMAP3430_PER_MOD, PM_WKEN);
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/* and allow them to wake up MPU */
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omap2_prm_write_mod_reg(omap3630_grpsel_uart4_mask |
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OMAP3430_GRPSEL_GPIO2_MASK |
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OMAP3430_GRPSEL_GPIO3_MASK |
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OMAP3430_GRPSEL_GPIO4_MASK |
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OMAP3430_GRPSEL_GPIO5_MASK |
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OMAP3430_GRPSEL_GPIO6_MASK |
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OMAP3430_GRPSEL_UART3_MASK |
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OMAP3430_GRPSEL_MCBSP2_MASK |
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OMAP3430_GRPSEL_MCBSP3_MASK |
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OMAP3430_GRPSEL_MCBSP4_MASK,
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OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
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/* Don't attach IVA interrupts */
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if (omap3_has_iva()) {
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omap2_prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
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omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
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omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
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omap2_prm_write_mod_reg(0, OMAP3430_PER_MOD,
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OMAP3430_PM_IVAGRPSEL);
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}
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/* Clear any pending 'reset' flags */
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omap2_prm_write_mod_reg(0xffffffff, MPU_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, OMAP2_RM_RSTST);
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/* Clear any pending PRCM interrupts */
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omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
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omap3_prm_init_pm(cpu_is_omap3630(), omap3_has_iva());
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/*
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* We need to idle iva2_pwrdm even on am3703 with no iva2.
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@ -274,6 +274,96 @@ void __init omap3_prm_reset_modem(void)
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omap2_prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL);
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}
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/**
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* omap3_prm_init_pm - initialize PM related registers for PRM
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* @has_uart4: SoC has UART4
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* @has_iva: SoC has IVA
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*
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* Initializes PRM registers for PM use. Called from PM init.
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*/
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void __init omap3_prm_init_pm(bool has_uart4, bool has_iva)
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{
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u32 en_uart4_mask;
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u32 grpsel_uart4_mask;
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/*
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* Enable control of expternal oscillator through
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* sys_clkreq. In the long run clock framework should
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* take care of this.
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*/
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omap2_prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK,
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1 << OMAP_AUTOEXTCLKMODE_SHIFT,
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OMAP3430_GR_MOD,
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OMAP3_PRM_CLKSRC_CTRL_OFFSET);
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/* setup wakup source */
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omap2_prm_write_mod_reg(OMAP3430_EN_IO_MASK | OMAP3430_EN_GPIO1_MASK |
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OMAP3430_EN_GPT1_MASK | OMAP3430_EN_GPT12_MASK,
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WKUP_MOD, PM_WKEN);
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/* No need to write EN_IO, that is always enabled */
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omap2_prm_write_mod_reg(OMAP3430_GRPSEL_GPIO1_MASK |
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OMAP3430_GRPSEL_GPT1_MASK |
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OMAP3430_GRPSEL_GPT12_MASK,
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WKUP_MOD, OMAP3430_PM_MPUGRPSEL);
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/* Enable PM_WKEN to support DSS LPR */
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omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK,
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OMAP3430_DSS_MOD, PM_WKEN);
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if (has_uart4) {
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en_uart4_mask = OMAP3630_EN_UART4_MASK;
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grpsel_uart4_mask = OMAP3630_GRPSEL_UART4_MASK;
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}
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/* Enable wakeups in PER */
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omap2_prm_write_mod_reg(en_uart4_mask |
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OMAP3430_EN_GPIO2_MASK |
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OMAP3430_EN_GPIO3_MASK |
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OMAP3430_EN_GPIO4_MASK |
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OMAP3430_EN_GPIO5_MASK |
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OMAP3430_EN_GPIO6_MASK |
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OMAP3430_EN_UART3_MASK |
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OMAP3430_EN_MCBSP2_MASK |
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OMAP3430_EN_MCBSP3_MASK |
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OMAP3430_EN_MCBSP4_MASK,
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OMAP3430_PER_MOD, PM_WKEN);
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/* and allow them to wake up MPU */
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omap2_prm_write_mod_reg(grpsel_uart4_mask |
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OMAP3430_GRPSEL_GPIO2_MASK |
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OMAP3430_GRPSEL_GPIO3_MASK |
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OMAP3430_GRPSEL_GPIO4_MASK |
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OMAP3430_GRPSEL_GPIO5_MASK |
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OMAP3430_GRPSEL_GPIO6_MASK |
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OMAP3430_GRPSEL_UART3_MASK |
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OMAP3430_GRPSEL_MCBSP2_MASK |
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OMAP3430_GRPSEL_MCBSP3_MASK |
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OMAP3430_GRPSEL_MCBSP4_MASK,
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OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
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/* Don't attach IVA interrupts */
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if (has_iva) {
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omap2_prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
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omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
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omap2_prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
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omap2_prm_write_mod_reg(0, OMAP3430_PER_MOD,
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OMAP3430_PM_IVAGRPSEL);
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}
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/* Clear any pending 'reset' flags */
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omap2_prm_write_mod_reg(0xffffffff, MPU_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, OMAP2_RM_RSTST);
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omap2_prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD,
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OMAP2_RM_RSTST);
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/* Clear any pending PRCM interrupts */
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omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
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}
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/**
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* omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
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*
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@ -167,6 +167,7 @@ void omap3xxx_prm_iva_idle(void);
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void omap3_prm_reset_modem(void);
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int omap3xxx_prm_clear_global_cold_reset(void);
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void omap3_prm_save_scratchpad_contents(u32 *ptr);
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void omap3_prm_init_pm(bool has_uart4, bool has_iva);
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#endif /* __ASSEMBLER */
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