ARM: Orion: XOR: Add support for clk
Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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1f80b126d0
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c510182b1c
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@ -87,7 +87,7 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
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void __init kirkwood_clk_init(void)
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void __init kirkwood_clk_init(void)
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{
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{
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struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
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struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
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struct clk *crypto;
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struct clk *crypto, *xor0, *xor1;
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tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
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tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
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CLK_IS_ROOT, kirkwood_tclk);
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CLK_IS_ROOT, kirkwood_tclk);
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@ -100,8 +100,8 @@ void __init kirkwood_clk_init(void)
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usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
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usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
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sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
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sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
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crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
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crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
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kirkwood_register_gate("xor0", CGC_BIT_XOR0);
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xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
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kirkwood_register_gate("xor1", CGC_BIT_XOR1);
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xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
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kirkwood_register_gate("pex0", CGC_BIT_PEX0);
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kirkwood_register_gate("pex0", CGC_BIT_PEX0);
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kirkwood_register_gate("pex1", CGC_BIT_PEX1);
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kirkwood_register_gate("pex1", CGC_BIT_PEX1);
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kirkwood_register_gate("audio", CGC_BIT_AUDIO);
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kirkwood_register_gate("audio", CGC_BIT_AUDIO);
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@ -120,6 +120,8 @@ void __init kirkwood_clk_init(void)
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orion_clkdev_add(NULL, "orion_nand", runit);
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orion_clkdev_add(NULL, "orion_nand", runit);
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orion_clkdev_add(NULL, "mvsdio", sdio);
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orion_clkdev_add(NULL, "mvsdio", sdio);
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orion_clkdev_add(NULL, "mv_crypto", crypto);
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orion_clkdev_add(NULL, "mv_crypto", crypto);
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orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
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orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
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}
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}
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/*****************************************************************************
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/*****************************************************************************
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@ -336,7 +338,6 @@ void __init kirkwood_crypto_init(void)
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void __init kirkwood_xor0_init(void)
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void __init kirkwood_xor0_init(void)
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{
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{
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kirkwood_clk_ctrl |= CGC_XOR0;
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kirkwood_clk_ctrl |= CGC_XOR0;
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orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
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orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
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IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
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IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
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}
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}
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@ -348,7 +349,6 @@ void __init kirkwood_xor0_init(void)
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void __init kirkwood_xor1_init(void)
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void __init kirkwood_xor1_init(void)
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{
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{
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kirkwood_clk_ctrl |= CGC_XOR1;
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kirkwood_clk_ctrl |= CGC_XOR1;
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orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
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orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
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IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
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IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
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}
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}
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@ -25,6 +25,7 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/memory.h>
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#include <linux/memory.h>
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#include <linux/clk.h>
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#include <plat/mv_xor.h>
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#include <plat/mv_xor.h>
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#include "dmaengine.h"
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#include "dmaengine.h"
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@ -1307,11 +1308,25 @@ static int mv_xor_shared_probe(struct platform_device *pdev)
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if (dram)
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if (dram)
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mv_xor_conf_mbus_windows(msp, dram);
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mv_xor_conf_mbus_windows(msp, dram);
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/* Not all platforms can gate the clock, so it is not
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* an error if the clock does not exists.
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*/
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msp->clk = clk_get(&pdev->dev, NULL);
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if (!IS_ERR(msp->clk))
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clk_prepare_enable(msp->clk);
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return 0;
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return 0;
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}
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}
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static int mv_xor_shared_remove(struct platform_device *pdev)
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static int mv_xor_shared_remove(struct platform_device *pdev)
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{
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{
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struct mv_xor_shared_private *msp = platform_get_drvdata(pdev);
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if (!IS_ERR(msp->clk)) {
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clk_disable_unprepare(msp->clk);
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clk_put(msp->clk);
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}
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return 0;
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return 0;
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}
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}
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@ -55,6 +55,7 @@
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struct mv_xor_shared_private {
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struct mv_xor_shared_private {
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void __iomem *xor_base;
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void __iomem *xor_base;
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void __iomem *xor_high_base;
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void __iomem *xor_high_base;
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struct clk *clk;
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};
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};
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