[PATCH] shpchp: Cleanup interrupt handler
This patch cleans up the interrupt handler of shpchp driver. This patch has no functional changes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -90,6 +90,12 @@
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#define MRLSENSOR 0x40000000
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#define ATTN_BUTTON 0x80000000
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/*
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* Interrupt Locator Register definitions
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*/
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#define CMD_INTR_PENDING (1 << 0)
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#define SLOT_INTR_PENDING(i) (1 << (i + 1))
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/*
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* Controller SERR-INT Register
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*/
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@ -218,7 +224,7 @@ static spinlock_t list_lock;
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static atomic_t shpchp_num_controllers = ATOMIC_INIT(0);
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static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs);
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static irqreturn_t shpc_isr(int irq, void *dev_id, struct pt_regs *regs);
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static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds);
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static int hpc_check_cmd_status(struct controller *ctrl);
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@ -279,7 +285,7 @@ static void int_poll_timeout(unsigned long lphp_ctlr)
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}
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/* Poll for interrupt events. regs == NULL => polling */
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shpc_isr( 0, (void *)php_ctlr, NULL );
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shpc_isr(0, php_ctlr->callback_instance_id, NULL );
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init_timer(&php_ctlr->int_poll_timer);
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if (!shpchp_poll_time)
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@ -875,103 +881,86 @@ static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
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return retval;
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}
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static irqreturn_t shpc_isr(int IRQ, void *dev_id, struct pt_regs *regs)
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static irqreturn_t shpc_isr(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct controller *ctrl = NULL;
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struct php_ctlr_state_s *php_ctlr;
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u8 schedule_flag = 0;
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u32 temp_dword, intr_loc, intr_loc2;
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struct controller *ctrl = (struct controller *)dev_id;
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struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
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u32 serr_int, slot_reg, intr_loc, intr_loc2;
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int hp_slot;
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if (!dev_id)
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return IRQ_NONE;
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if (!shpchp_poll_mode) {
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ctrl = (struct controller *)dev_id;
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php_ctlr = ctrl->hpc_ctlr_handle;
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} else {
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php_ctlr = (struct php_ctlr_state_s *) dev_id;
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ctrl = (struct controller *)php_ctlr->callback_instance_id;
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}
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if (!ctrl)
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return IRQ_NONE;
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if (!php_ctlr || !php_ctlr->creg)
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return IRQ_NONE;
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/* Check to see if it was our interrupt */
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intr_loc = shpc_readl(ctrl, INTR_LOC);
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if (!intr_loc)
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return IRQ_NONE;
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dbg("%s: intr_loc = %x\n",__FUNCTION__, intr_loc);
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if(!shpchp_poll_mode) {
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/* Mask Global Interrupt Mask - see implementation note on p. 139 */
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/* of SHPC spec rev 1.0*/
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temp_dword = shpc_readl(ctrl, SERR_INTR_ENABLE);
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temp_dword |= GLOBAL_INTR_MASK;
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temp_dword &= ~SERR_INTR_RSVDZ_MASK;
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shpc_writel(ctrl, SERR_INTR_ENABLE, temp_dword);
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/*
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* Mask Global Interrupt Mask - see implementation
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* note on p. 139 of SHPC spec rev 1.0
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*/
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serr_int = shpc_readl(ctrl, SERR_INTR_ENABLE);
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serr_int |= GLOBAL_INTR_MASK;
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serr_int &= ~SERR_INTR_RSVDZ_MASK;
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shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
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intr_loc2 = shpc_readl(ctrl, INTR_LOC);
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dbg("%s: intr_loc2 = %x\n",__FUNCTION__, intr_loc2);
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}
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if (intr_loc & 0x0001) {
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if (intr_loc & CMD_INTR_PENDING) {
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/*
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* Command Complete Interrupt Pending
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* RO only - clear by writing 1 to the Command Completion
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* Detect bit in Controller SERR-INT register
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*/
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temp_dword = shpc_readl(ctrl, SERR_INTR_ENABLE);
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temp_dword &= ~SERR_INTR_RSVDZ_MASK;
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shpc_writel(ctrl, SERR_INTR_ENABLE, temp_dword);
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serr_int = shpc_readl(ctrl, SERR_INTR_ENABLE);
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serr_int &= ~SERR_INTR_RSVDZ_MASK;
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shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
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ctrl->cmd_busy = 0;
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wake_up_interruptible(&ctrl->queue);
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}
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if ((intr_loc = (intr_loc >> 1)) == 0)
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if (!(intr_loc & ~CMD_INTR_PENDING))
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goto out;
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for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
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/* To find out which slot has interrupt pending */
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if ((intr_loc >> hp_slot) & 0x01) {
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temp_dword = shpc_readl(ctrl, SLOT_REG(hp_slot));
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if (!(intr_loc & SLOT_INTR_PENDING(hp_slot)))
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continue;
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slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
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dbg("%s: Slot %x with intr, slot register = %x\n",
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__FUNCTION__, hp_slot, temp_dword);
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if ((php_ctlr->switch_change_callback) &&
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(temp_dword & MRL_CHANGE_DETECTED))
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schedule_flag += php_ctlr->switch_change_callback(
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__FUNCTION__, hp_slot, slot_reg);
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if (slot_reg & MRL_CHANGE_DETECTED)
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php_ctlr->switch_change_callback(
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hp_slot, php_ctlr->callback_instance_id);
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if ((php_ctlr->attention_button_callback) &&
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(temp_dword & BUTTON_PRESS_DETECTED))
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schedule_flag += php_ctlr->attention_button_callback(
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if (slot_reg & BUTTON_PRESS_DETECTED)
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php_ctlr->attention_button_callback(
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hp_slot, php_ctlr->callback_instance_id);
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if ((php_ctlr->presence_change_callback) &&
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(temp_dword & PRSNT_CHANGE_DETECTED))
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schedule_flag += php_ctlr->presence_change_callback(
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if (slot_reg & PRSNT_CHANGE_DETECTED)
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php_ctlr->presence_change_callback(
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hp_slot , php_ctlr->callback_instance_id);
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if ((php_ctlr->power_fault_callback) &&
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(temp_dword & (ISO_PFAULT_DETECTED | CON_PFAULT_DETECTED)))
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schedule_flag += php_ctlr->power_fault_callback(
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if (slot_reg & (ISO_PFAULT_DETECTED | CON_PFAULT_DETECTED))
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php_ctlr->power_fault_callback(
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hp_slot, php_ctlr->callback_instance_id);
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/* Clear all slot events */
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temp_dword &= ~SLOT_REG_RSVDZ_MASK;
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shpc_writel(ctrl, SLOT_REG(hp_slot), temp_dword);
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intr_loc2 = shpc_readl(ctrl, INTR_LOC);
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dbg("%s: intr_loc2 = %x\n",__FUNCTION__, intr_loc2);
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}
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slot_reg &= ~SLOT_REG_RSVDZ_MASK;
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shpc_writel(ctrl, SLOT_REG(hp_slot), slot_reg);
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}
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out:
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if (!shpchp_poll_mode) {
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/* Unmask Global Interrupt Mask */
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temp_dword = shpc_readl(ctrl, SERR_INTR_ENABLE);
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temp_dword &= ~(GLOBAL_INTR_MASK | SERR_INTR_RSVDZ_MASK);
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shpc_writel(ctrl, SERR_INTR_ENABLE, temp_dword);
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serr_int = shpc_readl(ctrl, SERR_INTR_ENABLE);
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serr_int &= ~(GLOBAL_INTR_MASK | SERR_INTR_RSVDZ_MASK);
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shpc_writel(ctrl, SERR_INTR_ENABLE, serr_int);
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}
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return IRQ_HANDLED;
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