Here are a couple last-minute fixes for ARM SoCs. Most of them
are for the OMAP platforms, quoting Tony Lindgren: Fixes for omaps for v4.6-rc cycle. All dts fixes, mostly affecting voltages and pinctrl for various device drivers: - Regulator minimum voltage fixes for omap5 - ISP syscon register offset fix for omap3 - Fix regulator initial modes for n900 - Fix omap5 pinctrl wkup instance size The rest are all for different platforms: - Allwinner: Remove incorrect constraints from a dcdc1 regulator - Alltera SoCFPGA: Fix compilation in thumb2 mode - Samsung exynos: Fix a potential oops in the pm-domain error handling - Davinci: Avoid a link error if NVMEM is disabled - Renesas: Do not mark an external uart clock as disabled, to allow probing the uarts -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAVyud6WCrR//JCVInAQKhXBAAir8+FCYQGLzwFQrCHTRa6zJq0sGUOLss DBawxezSxtcz9LYn2s9EI5W7yqs/vtjILNTtV3bNNHZTrn/cE8Jpvo+kjNK096PP 3m0LS20pbGV/629JXiuf55pWugoXUvQNP4kTcuW8dQzQWWuzv2QfJwtW776Q8rOQ ZRvh6uUsCgsc6JCCnZESVAnWQ7VA5YpTpZRhokhogdU0r6VTuHfOf8NPD10kiel+ jpayjC852MPJtS+1JI/d9vIydsSPHbfS8lkVp0rX7oep/Xjp6C3HGSNH+KkLTjXf 9q6uVm21Kko24wd3RAFYNFshNmD80j+BQJN+59gx7jUnQsVA+WZkNlKSPD1svf+R 9Ym+fGVn+UgsU/rSW+hhTYft7ao6Tud+W80QARFgWX6B3E3xF/ExJ9TE07hg0sK7 b+JZAFoSnEut6yTq5g99/YdvDLfqANPo3f3968bl18rKh15Iso/u177KR3cbMPBw rKFXg9fkmjd3g5mUUekYvaEKbb+bEeLaAT+2Cri3diSW7odTzsLQSXELS0UTOWfx TLTJSkmgxvABhdZZPQscHBvxwXPGQO8S479GGXG2xcI+tiT7ZDJPZeVm0P99B8WB Y2VjTjuc49ZALrzT93nY9nInyjhzI5NsnccG5Khw+qoxlZ3+H+N2tVkhwt6+FNcg vl8vcFbj9hM= =ymz3 -----END PGP SIGNATURE----- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "Here are a couple last-minute fixes for ARM SoCs. Most of them are for the OMAP platforms, the rest are all for different platforms. OMAP: All dts fixes, mostly affecting voltages and pinctrl for various device drivers: - Regulator minimum voltage fixes for omap5 - ISP syscon register offset fix for omap3 - Fix regulator initial modes for n900 - Fix omap5 pinctrl wkup instance size Allwinner: Remove incorrect constraints from a dcdc1 regulator Alltera SoCFPGA: Fix compilation in thumb2 mode Samsung exynos: Fix a potential oops in the pm-domain error handling Davinci: Avoid a link error if NVMEM is disabled Renesas: Do not mark an external uart clock as disabled, to allow probing the uarts" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: davinci: only use NVMEM when available ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel ARM: dts: omap5: fix range of permitted wakeup pinmux registers ARM: dts: omap3-n900: Specify peripherals LDO regulators initial mode ARM: dts: omap3: Fix ISP syscon register offset ARM: dts: omap5-cm-t54: fix ldo1_reg and ldo4_reg ranges ARM: dts: omap5-board-common: fix ldo1_reg and ldo4_reg ranges arm64: dts: r8a7795: Don't disable referenced optional scif clock ARM: EXYNOS: Properly skip unitialized parent clock in power domain on ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
This commit is contained in:
commit
c4781a8df9
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@ -329,6 +329,7 @@
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regulator-name = "V28";
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regulator-name = "V28";
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regulator-min-microvolt = <2800000>;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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regulator-always-on; /* due to battery cover sensor */
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regulator-always-on; /* due to battery cover sensor */
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};
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};
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@ -336,30 +337,35 @@
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regulator-name = "VCSI";
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regulator-name = "VCSI";
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regulator-min-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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};
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};
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&vaux3 {
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&vaux3 {
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regulator-name = "VMMC2_30";
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regulator-name = "VMMC2_30";
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regulator-min-microvolt = <2800000>;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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};
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};
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&vaux4 {
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&vaux4 {
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regulator-name = "VCAM_ANA_28";
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regulator-name = "VCAM_ANA_28";
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regulator-min-microvolt = <2800000>;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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};
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};
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&vmmc1 {
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&vmmc1 {
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regulator-name = "VMMC1";
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regulator-name = "VMMC1";
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regulator-min-microvolt = <1850000>;
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regulator-min-microvolt = <1850000>;
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regulator-max-microvolt = <3150000>;
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regulator-max-microvolt = <3150000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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};
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};
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&vmmc2 {
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&vmmc2 {
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regulator-name = "V28_A";
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regulator-name = "V28_A";
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regulator-min-microvolt = <2800000>;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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regulator-always-on; /* due VIO leak to AIC34 VDDs */
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regulator-always-on; /* due VIO leak to AIC34 VDDs */
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};
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};
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@ -367,6 +373,7 @@
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regulator-name = "VPLL";
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regulator-name = "VPLL";
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regulator-min-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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regulator-always-on;
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regulator-always-on;
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};
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};
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@ -374,6 +381,7 @@
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regulator-name = "VSDI_CSI";
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regulator-name = "VSDI_CSI";
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regulator-min-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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regulator-always-on;
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regulator-always-on;
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};
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};
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@ -381,6 +389,7 @@
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regulator-name = "VMMC2_IO_18";
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regulator-name = "VMMC2_IO_18";
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regulator-min-microvolt = <1800000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
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};
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};
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&vio {
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&vio {
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@ -46,7 +46,7 @@
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0x480bd800 0x017c>;
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0x480bd800 0x017c>;
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interrupts = <24>;
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interrupts = <24>;
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iommus = <&mmu_isp>;
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iommus = <&mmu_isp>;
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syscon = <&scm_conf 0xdc>;
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syscon = <&scm_conf 0x6c>;
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ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
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ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
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#clock-cells = <1>;
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#clock-cells = <1>;
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ports {
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ports {
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@ -472,7 +472,7 @@
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ldo1_reg: ldo1 {
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ldo1_reg: ldo1 {
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/* VDDAPHY_CAM: vdda_csiport */
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/* VDDAPHY_CAM: vdda_csiport */
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regulator-name = "ldo1";
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regulator-name = "ldo1";
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regulator-min-microvolt = <1500000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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@ -498,7 +498,7 @@
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ldo4_reg: ldo4 {
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ldo4_reg: ldo4 {
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/* VDDAPHY_DISP: vdda_dsiport/hdmi */
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/* VDDAPHY_DISP: vdda_dsiport/hdmi */
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regulator-name = "ldo4";
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regulator-name = "ldo4";
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regulator-min-microvolt = <1500000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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@ -513,7 +513,7 @@
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ldo1_reg: ldo1 {
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ldo1_reg: ldo1 {
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/* VDDAPHY_CAM: vdda_csiport */
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/* VDDAPHY_CAM: vdda_csiport */
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regulator-name = "ldo1";
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regulator-name = "ldo1";
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regulator-min-microvolt = <1500000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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@ -537,7 +537,7 @@
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ldo4_reg: ldo4 {
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ldo4_reg: ldo4 {
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/* VDDAPHY_DISP: vdda_dsiport/hdmi */
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/* VDDAPHY_DISP: vdda_dsiport/hdmi */
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regulator-name = "ldo4";
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regulator-name = "ldo4";
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regulator-min-microvolt = <1500000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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@ -269,7 +269,7 @@
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omap5_pmx_wkup: pinmux@c840 {
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omap5_pmx_wkup: pinmux@c840 {
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compatible = "ti,omap5-padconf",
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compatible = "ti,omap5-padconf",
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"pinctrl-single";
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"pinctrl-single";
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reg = <0xc840 0x0038>;
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reg = <0xc840 0x003c>;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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#interrupt-cells = <1>;
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@ -125,8 +125,6 @@
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};
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};
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®_dc1sw {
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®_dc1sw {
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-lcd";
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regulator-name = "vcc-lcd";
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};
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};
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const char *partnum = NULL;
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const char *partnum = NULL;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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if (!IS_BUILTIN(CONFIG_NVMEM)) {
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pr_warn("Factory Config not available without CONFIG_NVMEM\n");
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goto bad_config;
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}
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ret = nvmem_device_read(nvmem, 0, sizeof(factory_config),
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ret = nvmem_device_read(nvmem, 0, sizeof(factory_config),
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&factory_config);
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&factory_config);
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if (ret != sizeof(struct factory_config)) {
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if (ret != sizeof(struct factory_config)) {
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char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
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char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
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off_t offset = (off_t)context;
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off_t offset = (off_t)context;
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if (!IS_BUILTIN(CONFIG_NVMEM)) {
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pr_warn("Cannot read MAC addr from EEPROM without CONFIG_NVMEM\n");
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return;
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}
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/* Read MAC addr from EEPROM */
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/* Read MAC addr from EEPROM */
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if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN)
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if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN)
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pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);
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pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);
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if (IS_ERR(pd->clk[i]))
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if (IS_ERR(pd->clk[i]))
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break;
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break;
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if (IS_ERR(pd->clk[i]))
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if (IS_ERR(pd->pclk[i]))
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continue; /* Skip on first power up */
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continue; /* Skip on first power up */
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if (clk_set_parent(pd->clk[i], pd->pclk[i]))
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if (clk_set_parent(pd->clk[i], pd->pclk[i]))
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pr_err("%s: error setting parent to clock%d\n",
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pr_err("%s: error setting parent to clock%d\n",
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@ -13,6 +13,7 @@
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#include <asm/assembler.h>
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#include <asm/assembler.h>
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.arch armv7-a
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.arch armv7-a
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.arm
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ENTRY(secondary_trampoline)
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ENTRY(secondary_trampoline)
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/* CPU1 will always fetch from 0x0 when it is brought out of reset.
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/* CPU1 will always fetch from 0x0 when it is brought out of reset.
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@ -120,7 +120,6 @@
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compatible = "fixed-clock";
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compatible = "fixed-clock";
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#clock-cells = <0>;
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#clock-cells = <0>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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status = "disabled";
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};
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};
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soc {
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soc {
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Loading…
Reference in New Issue