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mxser: cleanup mxser_process_txrx_fifo 

Rename process_txrx_fifo to mxser_process_txrx_fifo and:
* remove useless parentheses
* return from the 'if's true branch and process the rest in normal code
  flow (shift the code one level left)

All this to make the code more readable.

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Link: https://lore.kernel.org/r/20210618061516.662-50-jslaby@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jiri Slaby 2021-06-18 08:14:55 +02:00 committed by Greg Kroah-Hartman
parent c24c31ff4a
commit c3db20c3b7
1 changed files with 15 additions and 13 deletions
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28
drivers/tty/mxser.c
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@ -398,22 +398,24 @@ static enum mxser_must_hwid mxser_must_get_hwid(unsigned long io)
return MOXA_OTHER_UART;
}
static void process_txrx_fifo(struct mxser_port *info)
static void mxser_process_txrx_fifo(struct mxser_port *info)
{
int i;
unsigned int i;
if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
if (info->type == PORT_16450 || info->type == PORT_8250) {
info->rx_high_water = 1;
info->rx_low_water = 1;
info->xmit_fifo_size = 1;
} else
for (i = 0; i < UART_INFO_NUM; i++)
if (info->board->must_hwid == Gpci_uart_info[i].type) {
info->rx_low_water = Gpci_uart_info[i].rx_low_water;
info->rx_high_water = Gpci_uart_info[i].rx_high_water;
info->xmit_fifo_size = Gpci_uart_info[i].fifo_size;
break;
}
return;
}
for (i = 0; i < UART_INFO_NUM; i++)
if (info->board->must_hwid == Gpci_uart_info[i].type) {
info->rx_low_water = Gpci_uart_info[i].rx_low_water;
info->rx_high_water = Gpci_uart_info[i].rx_high_water;
info->xmit_fifo_size = Gpci_uart_info[i].fifo_size;
break;
}
}
static int mxser_carrier_raised(struct tty_port *port)
@ -1149,7 +1151,7 @@ static int mxser_set_serial_info(struct tty_struct *tty,
info->type = ss->type;
process_txrx_fifo(info);
mxser_process_txrx_fifo(info);
}
if (tty_port_initialized(port)) {
@ -1895,7 +1897,7 @@ static void mxser_initbrd(struct mxser_board *brd, bool high_baud)
info->type = PORT_16550A;
process_txrx_fifo(info);
mxser_process_txrx_fifo(info);
info->port.close_delay = 5 * HZ / 10;
info->port.closing_wait = 30 * HZ;