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[MIPS] SMTC: Safety net for i8259A interrupts. 

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Kevin D. Kissell 2007-07-27 18:45:25 +01:00 committed by Ralf Baechle
parent efaa534ed1
commit c3a005f4b6
1 changed files with 12 additions and 0 deletions
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12
arch/mips/mips-boards/malta/malta_int.c
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@ -330,6 +330,18 @@ void __init arch_init_irq(void)
(0x100 << MIPSCPU_INT_I8259A));
setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
&corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
/*
* Temporary hack to ensure that the subsidiary device
* interrupts coing in via the i8259A, but associated
* with low IRQ numbers, will restore the Status.IM
* value associated with the i8259A.
*/
{
int i;
for (i = 0; i < 16; i++)
irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
}
#else /* Not SMTC */
setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);