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vmxnet3: Remove useless DMA-32 fallback configuration 

As stated in [1], dma_set_mask() with a 64-bit mask never fails if
dev->dma_mask is non-NULL.
So, if it fails, the 32 bits case will also fail for the same reason.

So if dma_set_mask_and_coherent() succeeds, 'dma64' is know to be 'true'.

Simplify code and remove some dead code accordingly.

[1]: https://lkml.org/lkml/2021/6/7/398

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/43e5dcf1a5e9e9c5d2d86f87810d6e93e3d22e32.1641718188.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Christophe JAILLET 2022-01-09 09:50:22 +01:00 committed by Jakub Kicinski
parent 9aaa82d2e8
commit c38f306839
1 changed files with 7 additions and 15 deletions
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22
drivers/net/vmxnet3/vmxnet3_drv.c
View File

@ -3159,14 +3159,14 @@ out:
static void static void
vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) vmxnet3_declare_features(struct vmxnet3_adapter *adapter)
{ {
struct net_device *netdev = adapter->netdev; struct net_device *netdev = adapter->netdev;
netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
NETIF_F_LRO; NETIF_F_LRO | NETIF_F_HIGHDMA;
if (VMXNET3_VERSION_GE_4(adapter)) { if (VMXNET3_VERSION_GE_4(adapter)) {
netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
@ -3179,8 +3179,6 @@ vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
NETIF_F_GSO_UDP_TUNNEL_CSUM; NETIF_F_GSO_UDP_TUNNEL_CSUM;
} }
if (dma64)
netdev->hw_features |= NETIF_F_HIGHDMA;
netdev->vlan_features = netdev->hw_features & netdev->vlan_features = netdev->hw_features &
~(NETIF_F_HW_VLAN_CTAG_TX | ~(NETIF_F_HW_VLAN_CTAG_TX |
NETIF_F_HW_VLAN_CTAG_RX); NETIF_F_HW_VLAN_CTAG_RX);
@ -3397,7 +3395,6 @@ vmxnet3_probe_device(struct pci_dev *pdev,
#endif #endif
}; };
int err; int err;
bool dma64;
u32 ver; u32 ver;
struct net_device *netdev; struct net_device *netdev;
struct vmxnet3_adapter *adapter; struct vmxnet3_adapter *adapter;
@ -3439,15 +3436,10 @@ vmxnet3_probe_device(struct pci_dev *pdev,
adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE; adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE; adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) == 0) { err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
dma64 = true; if (err) {
} else { dev_err(&pdev->dev, "dma_set_mask failed\n");
err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); goto err_set_mask;
if (err) {
dev_err(&pdev->dev, "dma_set_mask failed\n");
goto err_set_mask;
}
dma64 = false;
} }
spin_lock_init(&adapter->cmd_lock); spin_lock_init(&adapter->cmd_lock);
@ -3614,7 +3606,7 @@ vmxnet3_probe_device(struct pci_dev *pdev,
} }
SET_NETDEV_DEV(netdev, &pdev->dev); SET_NETDEV_DEV(netdev, &pdev->dev);
vmxnet3_declare_features(adapter, dma64); vmxnet3_declare_features(adapter);
adapter->rxdata_desc_size = VMXNET3_VERSION_GE_3(adapter) ? adapter->rxdata_desc_size = VMXNET3_VERSION_GE_3(adapter) ?
VMXNET3_DEF_RXDATA_DESC_SIZE : 0; VMXNET3_DEF_RXDATA_DESC_SIZE : 0;